mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-27 13:33:40 +00:00
8ff21d6d9c
Commit 1473b12ad0 ("lib: fdtdec: Update ram_base to store ram start
adddress") brings regression on STM32F7 which can't boot.
Use fdtdec_setup_mem_size_base() to setup memory base and size.
Use fdtdec_setup_memory_banksize() to setup memory bank base and size.
Reported-by: Mark Olsson <mark@markolsson.se>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Mark Olsson <mark@markolsson.se>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
136 lines
2.6 KiB
C
136 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
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* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
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*/
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#include <common.h>
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#include <dm.h>
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#include <lcd.h>
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#include <ram.h>
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#include <spl.h>
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#include <splash.h>
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#include <st_logo_data.h>
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#include <video.h>
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#include <asm/io.h>
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#include <asm/armv7m.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/syscfg.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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#ifndef CONFIG_SUPPORT_SPL
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int rv;
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struct udevice *dev;
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rv = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (rv) {
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debug("DRAM init failed: %d\n", rv);
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return rv;
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}
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#endif
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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int board_early_init_f(void)
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{
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return 0;
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}
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#ifdef CONFIG_SPL_BUILD
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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debug("SPL: booting kernel\n");
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/* break into full u-boot on 'c' */
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return serial_tstc() && serial_getc() == 'c';
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}
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#endif
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int spl_dram_init(void)
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{
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struct udevice *dev;
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int rv;
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rv = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (rv)
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debug("DRAM init failed: %d\n", rv);
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return rv;
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}
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void spl_board_init(void)
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{
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spl_dram_init();
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preloader_console_init();
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arch_cpu_init(); /* to configure mpu for sdram rw permissions */
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_XIP;
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}
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#endif
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u32 get_board_rev(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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struct gpio_desc gpio = {};
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int node;
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node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
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if (node < 0)
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return -1;
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gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
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GPIOD_IS_OUT);
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if (dm_gpio_is_valid(&gpio)) {
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dm_gpio_set_value(&gpio, 0);
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mdelay(10);
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dm_gpio_set_value(&gpio, 1);
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}
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/* read button 1*/
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node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
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if (node < 0)
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return -1;
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gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
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&gpio, GPIOD_IS_IN);
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if (dm_gpio_is_valid(&gpio)) {
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if (dm_gpio_get_value(&gpio))
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puts("usr button is at HIGH LEVEL\n");
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else
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puts("usr button is at LOW LEVEL\n");
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}
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
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#ifdef CONFIG_ETH_DESIGNWARE
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/* Set >RMII mode */
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STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
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#endif
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#if defined(CONFIG_CMD_BMP)
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bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
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BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
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#endif /* CONFIG_CMD_BMP */
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return 0;
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}
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