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https://github.com/AsahiLinux/u-boot
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3820020299
Since 0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S
It's no longer required to call it from the board file.
With the current code, the banned <debug_uart> is printed twice:
<debug_uart>
<debug_uart>
U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)
Remove all calls from board_early_init_f .
Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
136 lines
3.2 KiB
C
136 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com>
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/at91_sfr.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#include <debug_uart.h>
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#include <asm/mach-types.h>
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extern void at91_pda_detect(void);
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DECLARE_GLOBAL_DATA_PTR;
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void at91_prepare_cpu_var(void);
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#ifdef CONFIG_CMD_NAND
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static void sam9x60ek_nand_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
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unsigned int csa;
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 2, 0); /* NAND ALE */
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 3, 0); /* NAND CLE */
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/* Enable NandFlash */
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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/* Configure RDY/BSY */
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 6, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 7, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 8, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 9, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 10, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 11, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 12, 1);
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at91_pio3_set_a_periph(AT91_PIO_PORTD, 13, 1);
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at91_periph_clk_enable(ATMEL_ID_PIOD);
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/* Enable CS3 */
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csa = readl(&sfr->ebicsa);
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csa |= AT91_SFR_CCFG_EBI_CSA(3, 1) | AT91_SFR_CCFG_NFD0_ON_D16;
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/* Configure IO drive */
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csa &= ~AT91_SFR_CCFG_EBI_DRIVE_SAM9X60;
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writel(csa, &sfr->ebicsa);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(4), &smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(20) |
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AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(20),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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#ifdef CONFIG_SYS_NAND_DBW_16
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AT91_SMC_MODE_DBW_16 |
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#else /* CONFIG_SYS_NAND_DBW_8 */
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AT91_SMC_MODE_DBW_8 |
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#endif
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AT91_SMC_MODE_TDF | AT91_SMC_MODE_TDF_CYCLE(15),
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&smc->cs[3].mode);
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}
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#endif
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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at91_prepare_cpu_var();
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at91_pda_detect();
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return 0;
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}
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#endif
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#ifdef CONFIG_DEBUG_UART_BOARD_INIT
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void board_debug_uart_init(void)
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{
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at91_seriald_hw_init();
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}
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#endif
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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return 0;
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}
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#endif
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#define MAC24AA_MAC_OFFSET 0xfa
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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#ifdef CONFIG_I2C_EEPROM
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at91_set_ethaddr(MAC24AA_MAC_OFFSET);
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#endif
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return 0;
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}
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#endif
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_CMD_NAND
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sam9x60ek_nand_hw_init();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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