mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 14:10:43 +00:00
a09fea1d28
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
99 lines
2.5 KiB
Text
99 lines
2.5 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3328=y
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CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
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CONFIG_TPL_LIBCOMMON_SUPPORT=y
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CONFIG_TPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_DEBUG_UART_BASE=0xFF130000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328"
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CONFIG_DEBUG_UART=y
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CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_ATF=y
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CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_TPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_TPL_OF_PLATDATA=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_TPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_TPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_TPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_FASTBOOT_BUF_ADDR=0x800800
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=1
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CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PHY=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_TPL_RAM=y
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CONFIG_DM_RESET=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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# CONFIG_TPL_SYSRESET is not set
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_GENERIC=y
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CONFIG_USB_DWC2=y
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CONFIG_USB_DWC3=y
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# CONFIG_USB_DWC3_GADGET is not set
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
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CONFIG_USB_GADGET_VENDOR_NUM=0x2207
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CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_TPL_TINY_MEMSET=y
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CONFIG_ERRNO_STR=y
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CONFIG_SMBIOS_MANUFACTURER="pine64"
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