mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-23 11:33:32 +00:00
c816dd0324
Update the labels of the nodes to match the kernel ones. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
58 lines
1.2 KiB
Text
58 lines
1.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
|
|
/*
|
|
* NXP LS1028A-QDS device tree fragment for RCW 7777
|
|
*
|
|
* Copyright 2019-2021 NXP
|
|
*/
|
|
|
|
/*
|
|
* This setup is using a SCH-30841 card with AQR412 10G quad PHY.
|
|
*
|
|
* Switch ports are mapped 1:1 to AQR412 card ports seated in slot 1.
|
|
* Bottom port is port 0.
|
|
* Note that this is only usable for:
|
|
* - QDS boards WITHOUT lane B rework,
|
|
* - AQR412 card WITHOUT lane A -> lane C rework
|
|
*
|
|
* The following DTS assumes DIP SW5[1-3] = 000b.
|
|
*/
|
|
&slot1 {
|
|
#include "fsl-sch-30841.dtsi"
|
|
};
|
|
|
|
&enetc_port2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mscc_felix {
|
|
status = "okay";
|
|
};
|
|
|
|
&mscc_felix_port0 {
|
|
status = "okay";
|
|
phy-mode = "2500base-x";
|
|
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
|
|
};
|
|
|
|
&mscc_felix_port1 {
|
|
status = "okay";
|
|
phy-mode = "2500base-x";
|
|
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
|
|
};
|
|
|
|
&mscc_felix_port2 {
|
|
status = "okay";
|
|
phy-mode = "2500base-x";
|
|
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
|
|
};
|
|
|
|
&mscc_felix_port3 {
|
|
status = "okay";
|
|
phy-mode = "2500base-x";
|
|
phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
|
|
};
|
|
|
|
&mscc_felix_port4 {
|
|
ethernet = <&enetc_port2>;
|
|
status = "okay";
|
|
};
|