mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-04 18:41:03 +00:00
c45568cc4e
This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com>
145 lines
3.9 KiB
C
145 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2019 NXP
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*/
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#ifndef __IMX8MM_CL_IOT_GATE_H
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#define __IMX8MM_CL_IOT_GATE_H
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#include <linux/sizes.h>
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#include <linux/stringify.h>
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#include <asm/arch/imx-regs.h>
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#include <config_distro_bootcmd.h>
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#define CONFIG_SYS_MONITOR_LEN SZ_512K
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#define CONFIG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#ifdef CONFIG_SPL_BUILD
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/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
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#define CONFIG_MALLOC_F_ADDR 0x912000
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/* For RAW image gives a error info not panic */
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#endif
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/* GUIDs for capsule updatable firmware images */
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#define IMX8MM_CL_IOT_GATE_FIT_IMAGE_GUID \
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EFI_GUID(0x7a32a939, 0xab92, 0x467b, 0x91, 0x52, \
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0x74, 0x77, 0x1b, 0x95, 0xe6, 0x46)
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#define IMX8MM_CL_IOT_GATE_OPTEE_FIT_IMAGE_GUID \
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EFI_GUID(0x0bf1165c, 0x1831, 0x4864, 0x94, 0x5e, \
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0xac, 0x3d, 0x38, 0x48, 0xf4, 0x99)
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#if CONFIG_IS_ENABLED(CMD_MMC)
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# define BOOT_TARGET_MMC(func) \
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func(MMC, mmc, 2) \
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func(MMC, mmc, 0)
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#else
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# define BOOT_TARGET_MMC(func)
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#endif
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#if CONFIG_IS_ENABLED(CMD_USB)
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# define BOOT_TARGET_USB(func) func(USB, usb, 0)
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#else
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# define BOOT_TARGET_USB(func)
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#endif
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#if CONFIG_IS_ENABLED(CMD_PXE)
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# define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
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#else
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# define BOOT_TARGET_PXE(func)
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#endif
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#if CONFIG_IS_ENABLED(CMD_DHCP)
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# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
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#else
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# define BOOT_TARGET_DHCP(func)
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#endif
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#define BOOT_TARGET_DEVICES(func) \
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BOOT_TARGET_USB(func) \
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BOOT_TARGET_MMC(func) \
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BOOT_TARGET_PXE(func) \
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BOOT_TARGET_DHCP(func)
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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"script=boot.scr\0" \
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"image=Image\0" \
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"console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
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"fdt_addr=0x43000000\0" \
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"fdt_addr_r=0x43000000\0" \
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"boot_fit=no\0" \
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"dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \
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"fdt_file=sb-iotgimx8.dtb\0" \
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"fdtfile=sb-iotgimx8.dtb\0" \
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"initrd_addr=0x43800000\0" \
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"bootm_size=0x10000000\0" \
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"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
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"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"kernel_addr_r=0x40480000\0" \
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"pxefile_addr_r=0x40480000\0" \
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"ramdisk_addr_r=0x43800000\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
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"bootm ${loadaddr}; " \
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"else " \
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"if run loadfdt; then " \
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"booti ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${loadaddr} ${image}; " \
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"if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
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"bootm ${loadaddr}; " \
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"else " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"booti ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi;\0"
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/* Link Definitions */
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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/* USDHC */
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_FEC_MXC_PHYADDR 0
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/* USB Configs */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#endif /*__IMX8MM_CL_IOT_GATE_H*/
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