mirror of
https://github.com/AsahiLinux/u-boot
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d23ff6827d
This patch allows U-Boot to use buffered writes to the Spansion NOR flash installed on this board, and eliminates long delays in network transfers after the board startup. Also modify flash layout to embed main and redundant environment blocks in the U-Boot image. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
94 lines
2.5 KiB
C
94 lines
2.5 KiB
C
/*
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* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/mx31.h>
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#include <asm/arch/mx31-regs.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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int board_init (void)
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{
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int i;
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/* CS0: Nor Flash */
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/*
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* CS0L and CS0A values are from the RedBoot sources by Freescale
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* and are also equal to those used by Sascha Hauer for the Phytec
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* i.MX31 board. CS0U is just a slightly optimized hardware default:
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* the only non-zero field "Wait State Control" is set to half the
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* default value.
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*/
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__REG(CSCR_U(0)) = 0x00000f00;
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__REG(CSCR_L(0)) = 0x10000D03;
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__REG(CSCR_A(0)) = 0x00720900;
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/* setup pins for UART1 */
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mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
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mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
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mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
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mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
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/* PBC setup */
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/* Enable UART transceivers also reset the Ethernet/external UART */
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readw(CS4_BASE + 4);
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writew(0x8023, CS4_BASE + 4);
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/* RedBoot also has an empty loop with 100000 iterations here -
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* clock doesn't run yet */
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for (i = 0; i < 100000; i++)
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;
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/* Clear the reset, toggle the LEDs */
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writew(0xDF, CS4_BASE + 6);
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/* clock still doesn't run */
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for (i = 0; i < 100000; i++)
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;
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/* See 1.5.4 in IMX31ADSE_PERI_BUS_CNTRL_CPLD_RM.pdf */
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readb(CS4_BASE + 8);
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readb(CS4_BASE + 7);
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readb(CS4_BASE + 8);
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readb(CS4_BASE + 7);
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gd->bd->bi_arch_number = 447; /* board id for linux */
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gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */
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return 0;
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}
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int checkboard (void)
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{
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printf("Board: MX31ADS\n");
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return 0;
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}
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