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01c7714a7b
Use the ZDMA channel 0 to initialize the DRAM banks. This avoid spurious ECC errors that can occur when accessing unitialized memory. The feature is enabled by setting the option CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT and providing the following data: SPL_ZYNQMP_DRAM_BANK1_BASE: start of memory to initialize SPL_ZYNQMP_DRAM_BANK1_LEN : len of memory to initialize (hex) SPL_ZYNQMP_DRAM_BANK2_BASE: start of memory to initialize SPL_ZYNQMP_DRAM_BANK2_LEN : len of memory to initialize (hex) Setting SPL_ZYNQMP_DRAM_BANK_LEN to 0 takes no action. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 lines
332 B
Makefile
11 lines
332 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2014 - 2015 Xilinx, Inc.
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# Michal Simek <michal.simek@xilinx.com>
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obj-y += clk.o
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obj-y += cpu.o
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obj-$(CONFIG_MP) += mp.o
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obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o
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obj-$(CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT) += ecc_spl_init.o
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obj-$(CONFIG_ZYNQMP_PSU_INIT_ENABLED) += psu_spl_init.o
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