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RISC-V privileged architecture v1.10 defines a real-time counter, exposed as a memory-mapped machine-mode register - mtime. mtime must run at constant frequency, and the platform must provide a mechanism for determining the timebase of mtime. The mtime register has a 64-bit precision on all RV32, RV64, and RV128 systems. Different platform may have different implementation of the mtime block hence an API riscv_get_time() is required by this driver for platform codes to hide such implementation details. For example, on some platforms mtime is provided by the CLINT module, while on some other platforms a simple 'rdtime' can be used to get the timer counter. With this timer driver the U-Boot timer functionalities like delay works correctly now. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org> |
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ag101p_timer.c | ||
altera_timer.c | ||
arc_timer.c | ||
ast_timer.c | ||
atcpit100_timer.c | ||
atmel_pit_timer.c | ||
cadence-ttc.c | ||
dw-apb-timer.c | ||
Kconfig | ||
Makefile | ||
mpc83xx_timer.c | ||
mtk_timer.c | ||
omap-timer.c | ||
riscv_timer.c | ||
rockchip_timer.c | ||
sandbox_timer.c | ||
sti-timer.c | ||
stm32_timer.c | ||
timer-uclass.c | ||
tsc_timer.c |