mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 16:10:58 +00:00
6d6228ab8f
Support added for HS-SE, HS-FS and GP boot binaries for AM62ax.
HS-SE:
* tiboot3-am62ax-hs-evm.bin
* tispl.bin
* u-boot.img
HS-FS:
* tiboot3-am62ax-hs-fs-evm.bin
* tispl.bin
* u-boot.img
GP:
* tiboot3.bin --> tiboot3-am62ax-gp-evm.bin
* tispl.bin_unsigned
* u-boot.img_unsigned
It is to be noted that the bootflow followed by AM62ax requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OP-TEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
147 lines
3.4 KiB
Text
147 lines
3.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* AM62A7 SK dts file for R5 SPL
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* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
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*/
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#include "k3-am62a7-sk.dts"
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#include "k3-am62a-ddr-1866mhz-32bit.dtsi"
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#include "k3-am62a-ddr.dtsi"
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#include "k3-am62a-sk-binman.dtsi"
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#include "k3-am62a7-sk-u-boot.dtsi"
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/ {
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aliases {
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remoteproc0 = &sysctrler;
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remoteproc1 = &a53_0;
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serial0 = &wkup_uart0;
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serial3 = &main_uart1;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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tick-timer = &timer1;
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};
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memory@80000000 {
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device_type = "memory";
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/* 4G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
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<0x00000008 0x80000000 0x00000000 0x80000000>;
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bootph-pre-ram;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
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alignment = <0x1000>;
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no-map;
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};
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};
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a53_0: a53@0 {
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compatible = "ti,am654-rproc";
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reg = <0x00 0x00a90000 0x00 0x10>;
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power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
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<&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
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resets = <&k3_reset 135 0>;
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clocks = <&k3_clks 61 0>;
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assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
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assigned-clock-parents = <&k3_clks 61 2>;
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assigned-clock-rates = <200000000>, <1200000000>;
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ti,sci = <&dmsc>;
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ti,sci-proc-id = <32>;
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ti,sci-host-id = <10>;
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bootph-pre-ram;
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};
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dm_tifs: dm-tifs {
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compatible = "ti,j721e-dm-sci";
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ti,host-id = <36>;
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ti,secure-host;
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mbox-names = "rx", "tx";
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mboxes= <&secure_proxy_main 22>,
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<&secure_proxy_main 23>;
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bootph-pre-ram;
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};
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};
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&dmsc {
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mboxes= <&secure_proxy_main 0>,
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<&secure_proxy_main 1>,
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<&secure_proxy_main 0>;
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mbox-names = "rx", "tx", "notify";
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ti,host-id = <35>;
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ti,secure-host;
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};
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&cbass_main {
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sa3_secproxy: secproxy@44880000 {
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compatible = "ti,am654-secure-proxy";
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#mbox-cells = <1>;
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reg = <0x00 0x44880000 0x00 0x20000>,
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<0x0 0x44860000 0x0 0x20000>,
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<0x0 0x43600000 0x0 0x10000>;
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reg-names = "rt", "scfg", "target_data";
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bootph-pre-ram;
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};
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sysctrler: sysctrler {
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compatible = "ti,am654-system-controller";
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mboxes= <&secure_proxy_main 1>,
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<&secure_proxy_main 0>,
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<&sa3_secproxy 0>;
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mbox-names = "tx", "rx", "boot_notify";
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bootph-pre-ram;
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};
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};
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&mcu_pmx0 {
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status = "okay";
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bootph-pre-ram;
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wkup_uart0_pins_default: wkup-uart0-pins-default {
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pinctrl-single,pins = <
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AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
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AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
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AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
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AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
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>;
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bootph-pre-ram;
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};
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};
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&main_pmx0 {
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bootph-pre-ram;
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main_uart1_pins_default: main-uart1-pins-default {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
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AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
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AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
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AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
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>;
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bootph-pre-ram;
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};
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};
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/* WKUP UART0 is used for DM firmware logs */
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&wkup_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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status = "okay";
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bootph-pre-ram;
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};
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/* Main UART1 is used for TIFS firmware logs */
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&main_uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart1_pins_default>;
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status = "okay";
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bootph-pre-ram;
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};
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