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7086defa04
Previously, in order for the `pinctrl-*` DT node properties to be properly processed, the pinctrl's subnodes were limited to only having the `pinmux` property as well as other additional properties (slew-rate, bias-disable, etc.). Now, with this patch the pinctrl driver is made to work similarly to the one from Linux. It can now distinguish between one subnode and a subnode with multiple subnodes. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
316 lines
8.5 KiB
C
316 lines
8.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Atmel PIO4 pinctrl driver
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*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/global_data.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <dm/pinctrl.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <dm/uclass-internal.h>
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#include <mach/atmel_pio4.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Warning:
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* In order to not introduce confusion between Atmel PIO groups and pinctrl
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* framework groups, Atmel PIO groups will be called banks.
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*/
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struct atmel_pio4_plat {
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struct atmel_pio4_port *reg_base;
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unsigned int slew_rate_support;
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};
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/*
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* Table keeping track of the pinctrl driver's slew rate support and the
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* corresponding index into the struct udevice_id of the gpio_atmel_pio4 GPIO
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* driver. This has been done in order to align the DT of U-Boot with the DT of
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* Linux. In Linux, a phandle from a '-gpio' DT property is linked to the
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* pinctrl driver, unlike U-Boot which redirects this phandle to a corresponding
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* UCLASS_GPIO driver. Thus, in order to link the two, a hook to the bind method
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* of the pinctrl driver in U-Boot has been added. This bind method will attach
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* the GPIO driver to the pinctrl DT node using this table.
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* @slew_rate_support pinctrl driver's slew rate support
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* @gdidx index into the GPIO driver's struct udevide_id
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* (needed in order to properly bind with driver_data)
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*/
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struct atmel_pinctrl_data {
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unsigned int slew_rate_support;
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int gdidx;
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};
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static const struct pinconf_param conf_params[] = {
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{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
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{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
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{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
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{ "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
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{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
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{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
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{ "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
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{ "atmel,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
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{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0},
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};
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static u32 atmel_pinctrl_get_pinconf(struct udevice *config,
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struct atmel_pio4_plat *plat)
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{
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const struct pinconf_param *params;
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u32 param, arg, conf = 0;
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u32 i;
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u32 val;
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for (i = 0; i < ARRAY_SIZE(conf_params); i++) {
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params = &conf_params[i];
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if (!dev_read_prop(config, params->property, NULL))
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continue;
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param = params->param;
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arg = params->default_value;
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/* Keep slew rate enabled by default. */
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if (plat->slew_rate_support)
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conf |= ATMEL_PIO_SR;
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switch (param) {
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case PIN_CONFIG_BIAS_DISABLE:
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conf &= (~ATMEL_PIO_PUEN_MASK);
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conf &= (~ATMEL_PIO_PDEN_MASK);
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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conf |= ATMEL_PIO_PUEN_MASK;
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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conf |= ATMEL_PIO_PDEN_MASK;
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break;
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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if (arg == 0)
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conf &= (~ATMEL_PIO_OPD_MASK);
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else
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conf |= ATMEL_PIO_OPD_MASK;
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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if (arg == 0)
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conf |= ATMEL_PIO_SCHMITT_MASK;
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else
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conf &= (~ATMEL_PIO_SCHMITT_MASK);
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break;
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case PIN_CONFIG_INPUT_DEBOUNCE:
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if (arg == 0) {
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conf &= (~ATMEL_PIO_IFEN_MASK);
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conf &= (~ATMEL_PIO_IFSCEN_MASK);
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} else {
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conf |= ATMEL_PIO_IFEN_MASK;
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conf |= ATMEL_PIO_IFSCEN_MASK;
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}
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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dev_read_u32(config, params->property, &val);
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conf &= (~ATMEL_PIO_DRVSTR_MASK);
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conf |= (val << ATMEL_PIO_DRVSTR_OFFSET)
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& ATMEL_PIO_DRVSTR_MASK;
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break;
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case PIN_CONFIG_SLEW_RATE:
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if (!plat->slew_rate_support)
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break;
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dev_read_u32(config, params->property, &val);
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/* And disable it if requested. */
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if (val == 0)
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conf &= ~ATMEL_PIO_SR;
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break;
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default:
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printf("%s: Unsupported configuration parameter: %u\n",
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__func__, param);
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break;
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}
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}
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return conf;
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}
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static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,
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u32 bank)
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{
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struct atmel_pio4_plat *plat = dev_get_plat(dev);
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struct atmel_pio4_port *bank_base =
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(struct atmel_pio4_port *)((u32)plat->reg_base +
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ATMEL_PIO_BANK_OFFSET * bank);
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return bank_base;
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}
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#define MAX_PINMUX_ENTRIES 40
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static int atmel_process_config_dev(struct udevice *dev, struct udevice *config)
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{
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struct atmel_pio4_plat *plat = dev_get_plat(dev);
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int node = dev_of_offset(config);
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struct atmel_pio4_port *bank_base;
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u32 offset, func, bank, line;
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u32 cells[MAX_PINMUX_ENTRIES];
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u32 i, conf;
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int count;
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conf = atmel_pinctrl_get_pinconf(config, plat);
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/*
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* The only case where this function returns a negative error value
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* is when there is no "pinmux" property attached to this node
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*/
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count = fdtdec_get_int_array_count(gd->fdt_blob, node, "pinmux",
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cells, ARRAY_SIZE(cells));
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if (count < 0)
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return count;
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if (count > MAX_PINMUX_ENTRIES)
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return -EINVAL;
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for (i = 0 ; i < count; i++) {
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offset = ATMEL_GET_PIN_NO(cells[i]);
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func = ATMEL_GET_PIN_FUNC(cells[i]);
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bank = ATMEL_PIO_BANK(offset);
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line = ATMEL_PIO_LINE(offset);
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bank_base = atmel_pio4_bank_base(dev, bank);
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writel(BIT(line), &bank_base->mskr);
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conf &= (~ATMEL_PIO_CFGR_FUNC_MASK);
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conf |= (func & ATMEL_PIO_CFGR_FUNC_MASK);
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writel(conf, &bank_base->cfgr);
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}
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return 0;
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}
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static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
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{
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int node = dev_of_offset(config);
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struct udevice *subconfig;
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int subnode, subnode_count = 0, ret;
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/*
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* If this function returns a negative error code then that means
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* that either the "pinmux" property of the node is missing, which is
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* the case for pinctrl nodes that do not have all the pins with the
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* same configuration and are split in multiple subnodes, or something
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* else went wrong and we have to stop. For the latter case, it would
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* mean that the node failed even though it has no subnodes.
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*/
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ret = atmel_process_config_dev(dev, config);
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if (!ret)
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return ret;
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/*
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* If we reach here, it means that the subnode pinctrl's DT has multiple
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* subnodes. If it does not, then something else went wrong in the
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* previous call to atmel_process_config_dev.
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*/
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fdt_for_each_subnode(subnode, gd->fdt_blob, node) {
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/* Get subnode as an udevice */
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ret = uclass_find_device_by_of_offset(UCLASS_PINCONFIG, subnode,
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&subconfig);
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if (ret)
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return ret;
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/*
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* If this time the function returns an error code on a subnode
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* then something is totally wrong so abort.
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*/
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ret = atmel_process_config_dev(dev, subconfig);
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if (ret)
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return ret;
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subnode_count++;
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}
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/*
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* If we somehow got here and we do not have any subnodes, abort.
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*/
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if (!subnode_count)
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return -EINVAL;
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return 0;
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}
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const struct pinctrl_ops atmel_pinctrl_ops = {
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.set_state = atmel_pinctrl_set_state,
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};
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static int atmel_pinctrl_probe(struct udevice *dev)
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{
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struct atmel_pio4_plat *plat = dev_get_plat(dev);
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struct atmel_pinctrl_data *priv = (struct atmel_pinctrl_data *)dev_get_driver_data(dev);
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fdt_addr_t addr_base;
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addr_base = dev_read_addr(dev);
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if (addr_base == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->reg_base = (struct atmel_pio4_port *)addr_base;
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plat->slew_rate_support = priv->slew_rate_support;
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return 0;
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}
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static int atmel_pinctrl_bind(struct udevice *dev)
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{
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struct udevice *g;
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struct driver *drv;
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ofnode node = dev_ofnode(dev);
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struct atmel_pinctrl_data *priv = (struct atmel_pinctrl_data *)dev_get_driver_data(dev);
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if (!CONFIG_IS_ENABLED(ATMEL_PIO4))
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return 0;
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/* Obtain a handle to the GPIO driver */
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drv = lists_driver_lookup_name("gpio_atmel_pio4");
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if (!drv)
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return -ENOENT;
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/*
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* Bind the GPIO driver to the pinctrl DT node, together
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* with its corresponding driver_data.
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*/
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return device_bind_with_driver_data(dev, drv, drv->name,
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drv->of_match[priv->gdidx].data,
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node, &g);
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}
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static const struct atmel_pinctrl_data atmel_sama5d2_pinctrl_data = {
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.gdidx = 0,
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};
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static const struct atmel_pinctrl_data microchip_sama7g5_pinctrl_data = {
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.slew_rate_support = 1,
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.gdidx = 1,
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};
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static const struct udevice_id atmel_pinctrl_match[] = {
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{ .compatible = "atmel,sama5d2-pinctrl",
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.data = (ulong)&atmel_sama5d2_pinctrl_data, },
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{ .compatible = "microchip,sama7g5-pinctrl",
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.data = (ulong)µchip_sama7g5_pinctrl_data, },
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{}
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};
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U_BOOT_DRIVER(atmel_pinctrl) = {
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.name = "pinctrl_atmel_pio4",
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.id = UCLASS_PINCTRL,
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.of_match = atmel_pinctrl_match,
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.bind = atmel_pinctrl_bind,
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.probe = atmel_pinctrl_probe,
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.plat_auto = sizeof(struct atmel_pio4_plat),
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.ops = &atmel_pinctrl_ops,
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};
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