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https://github.com/AsahiLinux/u-boot
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65cc0e2a65
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
200 lines
4.9 KiB
C
200 lines
4.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2006
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* Heiko Schocher, hs@denx.de
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* Based on ACE1XK.c
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*/
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#define LOG_CATEGORY UCLASS_FPGA
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#include <common.h> /* core U-Boot definitions */
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#include <log.h>
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#include <altera.h>
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#include <ACEX1K.h> /* ACEX device family */
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#include <linux/delay.h>
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/* Note: The assumption is that we cannot possibly run fast enough to
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* overrun the device (the Slave Parallel mode can free run at 50MHz).
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* If there is a need to operate slower, define CONFIG_FPGA_DELAY in
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* the board config file to slow things down.
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*/
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#ifndef CONFIG_FPGA_DELAY
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#define CONFIG_FPGA_DELAY()
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#endif
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#ifndef CFG_SYS_FPGA_WAIT
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#define CFG_SYS_FPGA_WAIT CONFIG_SYS_HZ / 10 /* 100 ms */
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#endif
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static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize);
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static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize);
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/* static int CYC2_ps_info( Altera_desc *desc ); */
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/* ------------------------------------------------------------------------- */
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/* CYCLON2 Generic Implementation */
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int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
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{
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int ret_val = FPGA_FAIL;
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switch (desc->iface) {
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case passive_serial:
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log_debug("Launching Passive Serial Loader\n");
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ret_val = CYC2_ps_load(desc, buf, bsize);
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break;
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case fast_passive_parallel:
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/* Fast Passive Parallel (FPP) and PS only differ in what is
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* done in the write() callback. Use the existing PS load
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* function for FPP, too.
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*/
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log_debug("Launching Fast Passive Parallel Loader\n");
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ret_val = CYC2_ps_load(desc, buf, bsize);
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break;
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/* Add new interface types here */
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default:
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printf("%s: Unsupported interface type, %d\n",
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__func__, desc->iface);
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}
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return ret_val;
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}
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int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)
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{
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int ret_val = FPGA_FAIL;
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switch (desc->iface) {
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case passive_serial:
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log_debug("Launching Passive Serial Dump\n");
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ret_val = CYC2_ps_dump(desc, buf, bsize);
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break;
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/* Add new interface types here */
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default:
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printf("%s: Unsupported interface type, %d\n",
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__func__, desc->iface);
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}
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return ret_val;
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}
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int CYC2_info(Altera_desc *desc)
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{
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return FPGA_SUCCESS;
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}
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/* ------------------------------------------------------------------------- */
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/* CYCLON2 Passive Serial Generic Implementation */
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static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
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{
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int ret_val = FPGA_FAIL; /* assume the worst */
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Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
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int ret = 0;
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log_debug("start with interface functions @ 0x%p\n", fn);
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if (fn) {
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int cookie = desc->cookie; /* make a local copy */
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unsigned long ts; /* timestamp */
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log_debug("Function Table:\n"
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"ptr:\t0x%p\n"
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"struct: 0x%p\n"
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"config:\t0x%p\n"
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"status:\t0x%p\n"
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"write:\t0x%p\n"
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"done:\t0x%p\n\n",
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&fn, fn, fn->config, fn->status,
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fn->write, fn->done);
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#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
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printf("Loading FPGA Device %d...", cookie);
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#endif
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/*
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* Run the pre configuration function if there is one.
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*/
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if (*fn->pre)
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(*fn->pre) (cookie);
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/* Establish the initial state */
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(*fn->config) (false, true, cookie); /* De-assert nCONFIG */
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udelay(100);
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(*fn->config) (true, true, cookie); /* Assert nCONFIG */
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udelay(2); /* T_cfg > 2us */
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/* Wait for nSTATUS to be asserted */
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ts = get_timer(0); /* get current time */
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do {
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CONFIG_FPGA_DELAY();
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if (get_timer(ts) > CFG_SYS_FPGA_WAIT) {
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/* check the time */
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puts("** Timeout waiting for STATUS to go high.\n");
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(*fn->abort) (cookie);
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return FPGA_FAIL;
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}
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} while (!(*fn->status) (cookie));
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/* Get ready for the burn */
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CONFIG_FPGA_DELAY();
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ret = (*fn->write) (buf, bsize, true, cookie);
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if (ret) {
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puts("** Write failed.\n");
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(*fn->abort) (cookie);
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return FPGA_FAIL;
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}
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#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
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puts(" OK? ...");
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#endif
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CONFIG_FPGA_DELAY();
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#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
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putc(' '); /* terminate the dotted line */
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#endif
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/*
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* Checking FPGA's CONF_DONE signal - correctly booted ?
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*/
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if (!(*fn->done) (cookie)) {
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puts("** Booting failed! CONF_DONE is still deasserted.\n");
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(*fn->abort) (cookie);
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return FPGA_FAIL;
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}
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#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
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puts(" OK\n");
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#endif
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ret_val = FPGA_SUCCESS;
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#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
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if (ret_val == FPGA_SUCCESS)
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puts("Done.\n");
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else
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puts("Fail.\n");
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#endif
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/*
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* Run the post configuration function if there is one.
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*/
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if (*fn->post)
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(*fn->post) (cookie);
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} else {
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printf("%s: NULL Interface function table!\n", __func__);
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}
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return ret_val;
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}
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static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)
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{
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/* Readback is only available through the Slave Parallel and */
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/* boundary-scan interfaces. */
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printf("%s: Passive Serial Dumping is unavailable\n", __func__);
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return FPGA_FAIL;
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}
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