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f46f3f356f
We should include common.h before other includes. This actually causes a build error on chromebook_link. Signed-off-by: Simon Glass <sjg@chromium.org>
760 lines
22 KiB
C
760 lines
22 KiB
C
/****************************************************************************
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*
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* BIOS emulator and interface
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* to Realmode X86 Emulator Library
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*
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* ========================================================================
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*
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* Copyright (C) 2007 Freescale Semiconductor, Inc.
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* Jason Jin<Jason.jin@freescale.com>
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*
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* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
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*
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* This file may be distributed and/or modified under the terms of the
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* GNU General Public License version 2.0 as published by the Free
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* Software Foundation and appearing in the file LICENSE.GPL included
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* in the packaging of this file.
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*
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* Licensees holding a valid Commercial License for this product from
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* SciTech Software, Inc. may use this file in accordance with the
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* Commercial License Agreement provided with the Software.
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*
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* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
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* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE.
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*
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* See http://www.scitechsoft.com/license/ for information about
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* the licensing options available and how to purchase a Commercial
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* License Agreement.
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*
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* Contact license@scitechsoft.com if any conditions of this licensing
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* are not clear to you, or you have questions about licensing options.
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*
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* ========================================================================
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*
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* Language: ANSI C
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* Environment: Any
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* Developer: Kendall Bennett
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*
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* Description: This file includes BIOS emulator I/O and memory access
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* functions.
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*
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* Jason ported this file to u-boot to run the ATI video card
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* BIOS in u-boot. Removed some emulate functions such as the
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* timer port access. Made all the VGA port except reading 0x3c3
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* be emulated. Seems like reading 0x3c3 should return the high
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* 16 bit of the io port.
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*
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****************************************************************************/
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#define __io
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#include <common.h>
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#include <asm/io.h>
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#include "biosemui.h"
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/*------------------------- Global Variables ------------------------------*/
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#ifndef CONFIG_X86EMU_RAW_IO
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static char *BE_biosDate = "08/14/99";
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static u8 BE_model = 0xFC;
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static u8 BE_submodel = 0x00;
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#endif
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#undef DEBUG_IO_ACCESS
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#ifdef DEBUG_IO_ACCESS
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#define debug_io(fmt, ...) printf(fmt, ##__VA_ARGS__)
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#else
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#define debug_io(x, b...)
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#endif
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/*----------------------------- Implementation ----------------------------*/
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to convert
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RETURNS:
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Actual memory address to read or write the data
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REMARKS:
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This function converts an emulator memory address in a 32-bit range to
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a real memory address that we wish to access. It handles splitting up the
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memory address space appropriately to access the emulator BIOS image, video
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memory and system BIOS etc.
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****************************************************************************/
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static u8 *BE_memaddr(u32 addr)
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{
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if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
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return (u8*)(_BE_env.biosmem_base + addr - 0xC0000);
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} else if (addr > _BE_env.biosmem_limit && addr < 0xD0000) {
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DB(printf("BE_memaddr: address %#lx may be invalid!\n",
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(ulong)addr);)
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return (u8 *)M.mem_base;
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} else if (addr >= 0xA0000 && addr <= 0xBFFFF) {
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return (u8*)(_BE_env.busmem_base + addr - 0xA0000);
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}
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#ifdef CONFIG_X86EMU_RAW_IO
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else if (addr >= 0xD0000 && addr <= 0xFFFFF) {
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/* We map the real System BIOS directly on real PC's */
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DB(printf("BE_memaddr: System BIOS address %#lx\n",
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(ulong)addr);)
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return (u8 *)_BE_env.busmem_base + addr - 0xA0000;
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}
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#else
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else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {
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/* Return a faked BIOS date string for non-x86 machines */
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debug_io("BE_memaddr - Returning BIOS date\n");
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return (u8 *)(BE_biosDate + addr - 0xFFFF5);
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} else if (addr == 0xFFFFE) {
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/* Return system model identifier for non-x86 machines */
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debug_io("BE_memaddr - Returning model\n");
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return &BE_model;
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} else if (addr == 0xFFFFF) {
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/* Return system submodel identifier for non-x86 machines */
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debug_io("BE_memaddr - Returning submodel\n");
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return &BE_submodel;
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}
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#endif
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else if (addr > M.mem_size - 1) {
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HALT_SYS();
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return (u8 *)M.mem_base;
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}
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return (u8 *)(M.mem_base + addr);
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}
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to read
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RETURNS:
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Byte value read from emulator memory.
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REMARKS:
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Reads a byte value from the emulator memory. We have three distinct memory
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regions that are handled differently, which this function handles.
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****************************************************************************/
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u8 X86API BE_rdb(u32 addr)
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{
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if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
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return 0;
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else {
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u8 val = readb_le(BE_memaddr(addr));
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return val;
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}
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}
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to read
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RETURNS:
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Word value read from emulator memory.
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REMARKS:
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Reads a word value from the emulator memory. We have three distinct memory
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regions that are handled differently, which this function handles.
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****************************************************************************/
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u16 X86API BE_rdw(u32 addr)
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{
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if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
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return 0;
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else {
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u8 *base = BE_memaddr(addr);
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u16 val = readw_le(base);
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return val;
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}
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}
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to read
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RETURNS:
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Long value read from emulator memory.
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REMARKS:
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Reads a 32-bit value from the emulator memory. We have three distinct memory
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regions that are handled differently, which this function handles.
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****************************************************************************/
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u32 X86API BE_rdl(u32 addr)
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{
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if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
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return 0;
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else {
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u8 *base = BE_memaddr(addr);
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u32 val = readl_le(base);
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return val;
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}
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}
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to read
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val - Value to store
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REMARKS:
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Writes a byte value to emulator memory. We have three distinct memory
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regions that are handled differently, which this function handles.
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****************************************************************************/
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void X86API BE_wrb(u32 addr, u8 val)
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{
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if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
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writeb_le(BE_memaddr(addr), val);
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}
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}
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to read
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val - Value to store
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REMARKS:
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Writes a word value to emulator memory. We have three distinct memory
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regions that are handled differently, which this function handles.
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****************************************************************************/
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void X86API BE_wrw(u32 addr, u16 val)
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{
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if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
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u8 *base = BE_memaddr(addr);
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writew_le(base, val);
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}
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}
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/****************************************************************************
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PARAMETERS:
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addr - Emulator memory address to read
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val - Value to store
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REMARKS:
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Writes a 32-bit value to emulator memory. We have three distinct memory
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regions that are handled differently, which this function handles.
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****************************************************************************/
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void X86API BE_wrl(u32 addr, u32 val)
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{
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if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
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u8 *base = BE_memaddr(addr);
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writel_le(base, val);
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}
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}
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#if !defined(CONFIG_X86EMU_RAW_IO)
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/* For Non-Intel machines we may need to emulate some I/O port accesses that
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* the BIOS may try to access, such as the PCI config registers.
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*/
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#define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43)
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#define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71)
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/*#define IS_VGA_PORT(port) (_BE_env.emulateVGA && 0x3C0 <= port && port <= 0x3DA)*/
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#define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA)
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#define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF)
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#define IS_SPKR_PORT(port) (port == 0x61)
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/****************************************************************************
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PARAMETERS:
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port - Port to read from
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type - Type of access to perform
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REMARKS:
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Performs an emulated read from the Standard VGA I/O ports. If the target
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hardware does not support mapping the VGA I/O and memory (such as some
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PowerPC systems), we emulate the VGA so that the BIOS will still be able to
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set NonVGA display modes such as on ATI hardware.
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****************************************************************************/
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static u8 VGA_inpb (const int port)
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{
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u8 val = 0xff;
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debug_io("vga_inb.%04X -> ", (u16) port);
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switch (port) {
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case 0x3C0:
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/* 3C0 has funky characteristics because it can act as either
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a data register or index register depending on the state
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of an internal flip flop in the hardware. Hence we have
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to emulate that functionality in here. */
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if (_BE_env.flipFlop3C0 == 0) {
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/* Access 3C0 as index register */
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val = _BE_env.emu3C0;
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} else {
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/* Access 3C0 as data register */
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if (_BE_env.emu3C0 < ATT_C)
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val = _BE_env.emu3C1[_BE_env.emu3C0];
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}
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_BE_env.flipFlop3C0 ^= 1;
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break;
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case 0x3C1:
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if (_BE_env.emu3C0 < ATT_C)
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return _BE_env.emu3C1[_BE_env.emu3C0];
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break;
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case 0x3CC:
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return _BE_env.emu3C2;
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case 0x3C4:
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return _BE_env.emu3C4;
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case 0x3C5:
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if (_BE_env.emu3C4 < ATT_C)
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return _BE_env.emu3C5[_BE_env.emu3C4];
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break;
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case 0x3C6:
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return _BE_env.emu3C6;
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case 0x3C7:
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return _BE_env.emu3C7;
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case 0x3C8:
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return _BE_env.emu3C8;
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case 0x3C9:
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if (_BE_env.emu3C7 < PAL_C)
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return _BE_env.emu3C9[_BE_env.emu3C7++];
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break;
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case 0x3CE:
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return _BE_env.emu3CE;
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case 0x3CF:
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if (_BE_env.emu3CE < GRA_C)
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return _BE_env.emu3CF[_BE_env.emu3CE];
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break;
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case 0x3D4:
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if (_BE_env.emu3C2 & 0x1)
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return _BE_env.emu3D4;
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break;
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case 0x3D5:
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if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
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return _BE_env.emu3D5[_BE_env.emu3D4];
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break;
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case 0x3DA:
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_BE_env.flipFlop3C0 = 0;
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val = _BE_env.emu3DA;
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_BE_env.emu3DA ^= 0x9;
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break;
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}
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return val;
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}
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/****************************************************************************
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PARAMETERS:
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port - Port to write to
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type - Type of access to perform
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REMARKS:
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Performs an emulated write to one of the 8253 timer registers. For now
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we only emulate timer 0 which is the only timer that the BIOS code appears
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to use.
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****************************************************************************/
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static void VGA_outpb (int port, u8 val)
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{
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switch (port) {
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case 0x3C0:
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/* 3C0 has funky characteristics because it can act as either
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a data register or index register depending on the state
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of an internal flip flop in the hardware. Hence we have
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to emulate that functionality in here. */
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if (_BE_env.flipFlop3C0 == 0) {
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/* Access 3C0 as index register */
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_BE_env.emu3C0 = val;
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} else {
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/* Access 3C0 as data register */
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if (_BE_env.emu3C0 < ATT_C)
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_BE_env.emu3C1[_BE_env.emu3C0] = val;
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}
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_BE_env.flipFlop3C0 ^= 1;
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break;
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case 0x3C2:
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_BE_env.emu3C2 = val;
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break;
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case 0x3C4:
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_BE_env.emu3C4 = val;
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break;
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case 0x3C5:
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if (_BE_env.emu3C4 < ATT_C)
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_BE_env.emu3C5[_BE_env.emu3C4] = val;
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break;
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case 0x3C6:
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_BE_env.emu3C6 = val;
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break;
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case 0x3C7:
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_BE_env.emu3C7 = (int) val *3;
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break;
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case 0x3C8:
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_BE_env.emu3C8 = (int) val *3;
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break;
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case 0x3C9:
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if (_BE_env.emu3C8 < PAL_C)
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_BE_env.emu3C9[_BE_env.emu3C8++] = val;
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break;
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case 0x3CE:
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_BE_env.emu3CE = val;
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break;
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case 0x3CF:
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if (_BE_env.emu3CE < GRA_C)
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_BE_env.emu3CF[_BE_env.emu3CE] = val;
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break;
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case 0x3D4:
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if (_BE_env.emu3C2 & 0x1)
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_BE_env.emu3D4 = val;
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break;
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case 0x3D5:
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if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
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_BE_env.emu3D5[_BE_env.emu3D4] = val;
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break;
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}
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}
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/****************************************************************************
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PARAMETERS:
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regOffset - Offset into register space for non-DWORD accesses
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value - Value to write to register for PCI_WRITE_* operations
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func - Function to perform (PCIAccessRegFlags)
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RETURNS:
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Value read from configuration register for PCI_READ_* operations
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REMARKS:
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Accesses a PCI configuration space register by decoding the value currently
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stored in the _BE_env.configAddress variable and passing it through to the
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portable PCI_accessReg function.
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****************************************************************************/
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static u32 BE_accessReg(int regOffset, u32 value, int func)
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{
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#ifdef __KERNEL__
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int function, device, bus;
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u8 val8;
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u16 val16;
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u32 val32;
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/* Decode the configuration register values for the register we wish to
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* access
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*/
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regOffset += (_BE_env.configAddress & 0xFF);
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function = (_BE_env.configAddress >> 8) & 0x7;
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device = (_BE_env.configAddress >> 11) & 0x1F;
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bus = (_BE_env.configAddress >> 16) & 0xFF;
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/* Ignore accesses to all devices other than the one we're POSTing */
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if ((function == _BE_env.vgaInfo.function) &&
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(device == _BE_env.vgaInfo.device) &&
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(bus == _BE_env.vgaInfo.bus)) {
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switch (func) {
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case REG_READ_BYTE:
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pci_read_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
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&val8);
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return val8;
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case REG_READ_WORD:
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pci_read_config_word(_BE_env.vgaInfo.pcidev, regOffset,
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&val16);
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return val16;
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case REG_READ_DWORD:
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pci_read_config_dword(_BE_env.vgaInfo.pcidev, regOffset,
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&val32);
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return val32;
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case REG_WRITE_BYTE:
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pci_write_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
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value);
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return 0;
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case REG_WRITE_WORD:
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pci_write_config_word(_BE_env.vgaInfo.pcidev, regOffset,
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value);
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return 0;
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case REG_WRITE_DWORD:
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pci_write_config_dword(_BE_env.vgaInfo.pcidev,
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regOffset, value);
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return 0;
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}
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}
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return 0;
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#else
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PCIDeviceInfo pciInfo;
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pciInfo.mech1 = 1;
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pciInfo.slot.i = 0;
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pciInfo.slot.p.Function = (_BE_env.configAddress >> 8) & 0x7;
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pciInfo.slot.p.Device = (_BE_env.configAddress >> 11) & 0x1F;
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pciInfo.slot.p.Bus = (_BE_env.configAddress >> 16) & 0xFF;
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pciInfo.slot.p.Enable = 1;
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/* Ignore accesses to all devices other than the one we're POSTing */
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if ((pciInfo.slot.p.Function ==
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_BE_env.vgaInfo.pciInfo->slot.p.Function)
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&& (pciInfo.slot.p.Device == _BE_env.vgaInfo.pciInfo->slot.p.Device)
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&& (pciInfo.slot.p.Bus == _BE_env.vgaInfo.pciInfo->slot.p.Bus))
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return PCI_accessReg((_BE_env.configAddress & 0xFF) + regOffset,
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value, func, &pciInfo);
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return 0;
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#endif
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}
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/****************************************************************************
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PARAMETERS:
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port - Port to read from
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type - Type of access to perform
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REMARKS:
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Performs an emulated read from one of the PCI configuration space registers.
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We emulate this using our PCI_accessReg function which will access the PCI
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configuration space registers in a portable fashion.
|
|
****************************************************************************/
|
|
static u32 PCI_inp(int port, int type)
|
|
{
|
|
switch (type) {
|
|
case REG_READ_BYTE:
|
|
if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
|
|
&& port <= 0xCFF)
|
|
return BE_accessReg(port - 0xCFC, 0, REG_READ_BYTE);
|
|
break;
|
|
case REG_READ_WORD:
|
|
if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
|
|
&& port <= 0xCFF)
|
|
return BE_accessReg(port - 0xCFC, 0, REG_READ_WORD);
|
|
break;
|
|
case REG_READ_DWORD:
|
|
if (port == 0xCF8)
|
|
return _BE_env.configAddress;
|
|
else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
|
|
return BE_accessReg(0, 0, REG_READ_DWORD);
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
type - Type of access to perform
|
|
|
|
REMARKS:
|
|
Performs an emulated write to one of the PCI control registers.
|
|
****************************************************************************/
|
|
static void PCI_outp(int port, u32 val, int type)
|
|
{
|
|
switch (type) {
|
|
case REG_WRITE_BYTE:
|
|
if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
|
|
&& port <= 0xCFF)
|
|
BE_accessReg(port - 0xCFC, val, REG_WRITE_BYTE);
|
|
break;
|
|
case REG_WRITE_WORD:
|
|
if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
|
|
&& port <= 0xCFF)
|
|
BE_accessReg(port - 0xCFC, val, REG_WRITE_WORD);
|
|
break;
|
|
case REG_WRITE_DWORD:
|
|
if (port == 0xCF8)
|
|
{
|
|
_BE_env.configAddress = val & 0x80FFFFFC;
|
|
}
|
|
else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
|
|
BE_accessReg(0, val, REG_WRITE_DWORD);
|
|
break;
|
|
}
|
|
}
|
|
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
|
|
RETURNS:
|
|
Value read from the I/O port
|
|
|
|
REMARKS:
|
|
Performs an emulated 8-bit read from an I/O port. We handle special cases
|
|
that we need to emulate in here, and fall through to reflecting the write
|
|
through to the real hardware if we don't need to special case it.
|
|
****************************************************************************/
|
|
u8 X86API BE_inb(X86EMU_pioAddr port)
|
|
{
|
|
u8 val = 0;
|
|
|
|
#if !defined(CONFIG_X86EMU_RAW_IO)
|
|
if (IS_VGA_PORT(port)){
|
|
/*seems reading port 0x3c3 return the high 16 bit of io port*/
|
|
if(port == 0x3c3)
|
|
val = LOG_inpb(port);
|
|
else
|
|
val = VGA_inpb(port);
|
|
}
|
|
else if (IS_TIMER_PORT(port))
|
|
DB(printf("Can not interept TIMER port now!\n");)
|
|
else if (IS_SPKR_PORT(port))
|
|
DB(printf("Can not interept SPEAKER port now!\n");)
|
|
else if (IS_CMOS_PORT(port))
|
|
DB(printf("Can not interept CMOS port now!\n");)
|
|
else if (IS_PCI_PORT(port))
|
|
val = PCI_inp(port, REG_READ_BYTE);
|
|
else if (port < 0x100) {
|
|
DB(printf("WARN: INVALID inb.%04X -> %02X\n", (u16) port, val);)
|
|
val = LOG_inpb(port);
|
|
} else
|
|
#endif
|
|
{
|
|
debug_io("inb.%04X -> ", (u16) port);
|
|
val = LOG_inpb(port);
|
|
debug_io("%02X\n", val);
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
|
|
RETURNS:
|
|
Value read from the I/O port
|
|
|
|
REMARKS:
|
|
Performs an emulated 16-bit read from an I/O port. We handle special cases
|
|
that we need to emulate in here, and fall through to reflecting the write
|
|
through to the real hardware if we don't need to special case it.
|
|
****************************************************************************/
|
|
u16 X86API BE_inw(X86EMU_pioAddr port)
|
|
{
|
|
u16 val = 0;
|
|
|
|
#if !defined(CONFIG_X86EMU_RAW_IO)
|
|
if (IS_PCI_PORT(port))
|
|
val = PCI_inp(port, REG_READ_WORD);
|
|
else if (port < 0x100) {
|
|
DB(printf("WARN: Maybe INVALID inw.%04X -> %04X\n", (u16) port, val);)
|
|
val = LOG_inpw(port);
|
|
} else
|
|
#endif
|
|
{
|
|
debug_io("inw.%04X -> ", (u16) port);
|
|
val = LOG_inpw(port);
|
|
debug_io("%04X\n", val);
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
|
|
RETURNS:
|
|
Value read from the I/O port
|
|
|
|
REMARKS:
|
|
Performs an emulated 32-bit read from an I/O port. We handle special cases
|
|
that we need to emulate in here, and fall through to reflecting the write
|
|
through to the real hardware if we don't need to special case it.
|
|
****************************************************************************/
|
|
u32 X86API BE_inl(X86EMU_pioAddr port)
|
|
{
|
|
u32 val = 0;
|
|
|
|
#if !defined(CONFIG_X86EMU_RAW_IO)
|
|
if (IS_PCI_PORT(port))
|
|
val = PCI_inp(port, REG_READ_DWORD);
|
|
else if (port < 0x100) {
|
|
val = LOG_inpd(port);
|
|
} else
|
|
#endif
|
|
{
|
|
debug_io("inl.%04X -> ", (u16) port);
|
|
val = LOG_inpd(port);
|
|
debug_io("%08X\n", val);
|
|
}
|
|
|
|
return val;
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
val - Value to write to port
|
|
|
|
REMARKS:
|
|
Performs an emulated 8-bit write to an I/O port. We handle special cases
|
|
that we need to emulate in here, and fall through to reflecting the write
|
|
through to the real hardware if we don't need to special case it.
|
|
****************************************************************************/
|
|
void X86API BE_outb(X86EMU_pioAddr port, u8 val)
|
|
{
|
|
#if !defined(CONFIG_X86EMU_RAW_IO)
|
|
if (IS_VGA_PORT(port))
|
|
VGA_outpb(port, val);
|
|
else if (IS_TIMER_PORT(port))
|
|
DB(printf("Can not interept TIMER port now!\n");)
|
|
else if (IS_SPKR_PORT(port))
|
|
DB(printf("Can not interept SPEAKER port now!\n");)
|
|
else if (IS_CMOS_PORT(port))
|
|
DB(printf("Can not interept CMOS port now!\n");)
|
|
else if (IS_PCI_PORT(port))
|
|
PCI_outp(port, val, REG_WRITE_BYTE);
|
|
else if (port < 0x100) {
|
|
DB(printf("WARN:Maybe INVALID outb.%04X <- %02X\n", (u16) port, val);)
|
|
LOG_outpb(port, val);
|
|
} else
|
|
#endif
|
|
{
|
|
debug_io("outb.%04X <- %02X", (u16) port, val);
|
|
LOG_outpb(port, val);
|
|
debug_io("\n");
|
|
}
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
val - Value to write to port
|
|
|
|
REMARKS:
|
|
Performs an emulated 16-bit write to an I/O port. We handle special cases
|
|
that we need to emulate in here, and fall through to reflecting the write
|
|
through to the real hardware if we don't need to special case it.
|
|
****************************************************************************/
|
|
void X86API BE_outw(X86EMU_pioAddr port, u16 val)
|
|
{
|
|
#if !defined(CONFIG_X86EMU_RAW_IO)
|
|
if (IS_VGA_PORT(port)) {
|
|
VGA_outpb(port, val);
|
|
VGA_outpb(port + 1, val >> 8);
|
|
} else if (IS_PCI_PORT(port)) {
|
|
PCI_outp(port, val, REG_WRITE_WORD);
|
|
} else if (port < 0x100) {
|
|
DB(printf("WARN: MAybe INVALID outw.%04X <- %04X\n", (u16)port,
|
|
val);)
|
|
LOG_outpw(port, val);
|
|
} else
|
|
#endif
|
|
{
|
|
debug_io("outw.%04X <- %04X", (u16) port, val);
|
|
LOG_outpw(port, val);
|
|
debug_io("\n");
|
|
}
|
|
}
|
|
|
|
/****************************************************************************
|
|
PARAMETERS:
|
|
port - Port to write to
|
|
val - Value to write to port
|
|
|
|
REMARKS:
|
|
Performs an emulated 32-bit write to an I/O port. We handle special cases
|
|
that we need to emulate in here, and fall through to reflecting the write
|
|
through to the real hardware if we don't need to special case it.
|
|
****************************************************************************/
|
|
void X86API BE_outl(X86EMU_pioAddr port, u32 val)
|
|
{
|
|
#if !defined(CONFIG_X86EMU_RAW_IO)
|
|
if (IS_PCI_PORT(port)) {
|
|
PCI_outp(port, val, REG_WRITE_DWORD);
|
|
} else if (port < 0x100) {
|
|
DB(printf("WARN: INVALID outl.%04X <- %08X\n", (u16) port,val);)
|
|
LOG_outpd(port, val);
|
|
} else
|
|
#endif
|
|
{
|
|
debug_io("outl.%04X <- %08X", (u16) port, val);
|
|
LOG_outpd(port, val);
|
|
debug_io("\n");
|
|
}
|
|
}
|