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Most peripherals on Tegra can do DMA only to the lower 32-bit address space, even on 64-bit SoCs. This limitation is typically overcome by the use of an IOMMU. Since the IOMMU is not entirely trivial to set up and serves no other purpose (I/O protection, ...) in U-Boot, restrict 64-bit Tegra SoCs to the lower 32-bit address space for RAM. This ensures that the physical addresses of buffers that are programmed into the various DMA engines are valid and don't alias to lower addresses. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
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.. | ||
cpu | ||
dts | ||
imx-common | ||
include | ||
lib | ||
mach-at91 | ||
mach-bcm283x | ||
mach-davinci | ||
mach-highbank | ||
mach-integrator | ||
mach-keystone | ||
mach-kirkwood | ||
mach-mvebu | ||
mach-nomadik | ||
mach-orion5x | ||
mach-socfpga | ||
mach-tegra | ||
mach-uniphier | ||
mach-versatile | ||
mach-zynq | ||
mvebu-common | ||
config.mk | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |