mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 18:59:44 +00:00
ff3832205e
Add support for Advantech DMS-BA16 board. The board is based on Advantech
BA16 module which has a i.MX6D processor. The board supports:
- FEC Ethernet
- USB Ports
- SDHC and MMC boot
- SPI NOR
- LVDS and HDMI display
Basic information about the module:
- Module manufacturer: Advantech
- CPU: Freescale ARM Cortex-A9 i.MX6D
- SPECS:
Up to 2GB Onboard DDR3 Memory;
Up to 16GB Onboard eMMC NAND Flash
Supports OpenGL ES 2.0 and OpenVG 1.1
HDMI, 24-bit LVDS
1x UART, 2x I2C, 8x GPIO,
4x Host USB 2.0 port, 1x USB OTG port,
1x micro SD (SDHC),1x SDIO, 1x SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sbabic@denx.de
63 lines
2.4 KiB
INI
63 lines
2.4 KiB
INI
/* Calibrations */
|
|
/* ZQ */
|
|
DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
|
|
/* write leveling */
|
|
DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F001F
|
|
DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
|
|
DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F
|
|
DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
|
/* Read DQS Gating calibration */
|
|
DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x45380544
|
|
DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x05280530
|
|
DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4530053C
|
|
DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x0530050C
|
|
/* Read calibration */
|
|
DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x36303032
|
|
DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x38363042
|
|
/* Write calibration */
|
|
DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A3A423E
|
|
DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4A38483E
|
|
/* read data bit delay */
|
|
DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
|
|
DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
|
|
|
|
/* Complete calibration by forced measurment */
|
|
DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
|
|
DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
|
|
|
|
/* MMDC init */
|
|
DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
|
|
DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
|
|
DATA 4, MX6_MMDC_P0_MDCFG0, 0x8A8F79A4
|
|
DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538E64
|
|
DATA 4, MX6_MMDC_P0_MDCFG2, 0x01ff00db
|
|
DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
|
|
DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2
|
|
DATA 4, MX6_MMDC_P0_MDOR, 0x008F1023
|
|
DATA 4, MX6_MMDC_P0_MDASP, 0x00000047
|
|
DATA 4, MX6_MMDC_P0_MDCTL, 0x841a0000
|
|
|
|
/* Initialize memory */
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x0408803a
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803b
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00408031
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00408039
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x09408030
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x09408038
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048
|
|
DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
|
|
DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00011117
|
|
DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00011117
|
|
DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576
|
|
DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
|
|
DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
|