mirror of
https://github.com/AsahiLinux/u-boot
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74de7aefd7
According to the doc/feature-removal-schedule.txt, the "autoscr"
command will be replaced by the "source" command in approximately 6
months from now.
This patch prepares this change and starts a 6 month transition
period as follows:
- The new "source" command has been added, which implements exactly
the same functionlaity as the old "autoscr" command before
- The old "autoscr" command name is kept as an alias for compatibility
- Command sequences, script files atc. have been adapted to use the
new "source" command
- Related environment variables ("autoscript", "autoscript_uname")
have *not* been adapted yet; these will be renamed resp. removed in
a separate patch when the support for the "autoscr" command get's
finally dropped.
Signed-off-by: Wolfgang Denk <wd@denx.de>
223 lines
6.3 KiB
C
223 lines
6.3 KiB
C
/*
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* (C) Copyright 2005
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* Thomas.Lange@corelatus.se
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* This file contains the configuration parameters for the gth2 board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
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#define CONFIG_GTH2 1
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#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
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#define CONFIG_SOC_AU1000 1
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#define CONFIG_MISC_INIT_R 1
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#define CONFIG_ETHADDR DE:AD:BE:EF:01:02 /* Ethernet address */
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#define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */
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#define CONFIG_ENV_OVERWRITE 1 /* Allow change of ethernet address */
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#define CONFIG_BOOT_RETRY_TIME 5 /* Retry boot in 5 secs */
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#define CONFIG_RESET_TO_RETRY 1 /* If timeout waiting for command, perform a reset */
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#define CONFIG_BAUDRATE 115200
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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/* Only interrupt boot if space is pressed */
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/* If a long serial cable is connected but */
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/* other end is dead, garbage will be read */
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#define CONFIG_AUTOBOOT_KEYED 1
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#define CONFIG_AUTOBOOT_PROMPT \
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"Press space to abort autoboot in %d second\n", bootdelay
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#define CONFIG_AUTOBOOT_DELAY_STR "d"
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#define CONFIG_AUTOBOOT_STOP_STR " "
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#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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#define CONFIG_BOOTARGS "panic=1"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"addmisc=setenv bootargs $(bootargs) " \
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"ethaddr=$(ethaddr) \0" \
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"netboot=bootp;run addmisc;bootm\0" \
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""
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/* Boot from Compact flash partition 2 as default */
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#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;run addmisc;bootm"
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_DHCP
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_BEDBUG
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#undef CONFIG_CMD_ELF
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#undef CONFIG_CMD_FAT
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADB
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_MII
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#undef CONFIG_CMD_NFS
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#undef CONFIG_CMD_SAVEENV
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#undef CONFIG_CMD_SOURCE
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "GTH2 # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
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#define CONFIG_SYS_MALLOC_LEN 128*1024
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#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
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#define CONFIG_SYS_MHZ 500
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#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
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#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
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#define CONFIG_SYS_MEMTEST_START 0x80100000
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#define CONFIG_SYS_MEMTEST_END 0x83000000
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#define CONFIG_HW_WATCHDOG 1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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#define PHYS_FLASH 0xbfc00000 /* Flash Bank #1 */
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/* The following #defines are needed to get flash environment right */
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#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
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#define CONFIG_SYS_MONITOR_LEN (192 << 10)
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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/* We boot from this flash, selected with dip switch */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
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#define CONFIG_ENV_IS_NOWHERE 1
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/* Address and size of Primary Environment Sector */
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#define CONFIG_ENV_ADDR 0xB0030000
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#define CONFIG_ENV_SIZE 0x10000
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#define CONFIG_FLASH_16BIT
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_NET_MULTI
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#define CONFIG_MEMSIZE_IN_BYTES
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/*---ATA PCMCIA ------------------------------------*/
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#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
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#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
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#define CONFIG_SYS_PCMCIA_IO_BASE 0x28000000
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#define CONFIG_SYS_PCMCIA_ATTR_BASE 0x30000000
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#define CONFIG_PCMCIA_SLOT_A
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#define CONFIG_ATAPI 1
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#define CONFIG_MAC_PARTITION 1
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/* We run CF in "true ide" mode or a harddrive via pcmcia */
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#define CONFIG_IDE_PCMCIA 1
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/* We only support one slot for now */
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#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
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#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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#undef CONFIG_IDE_LED /* LED for ide not supported */
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#undef CONFIG_IDE_RESET /* reset for ide not supported */
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0
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#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_IO_BASE
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/* Offset for data I/O */
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#define CONFIG_SYS_ATA_DATA_OFFSET 0
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/* Offset for normal register accesses */
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#define CONFIG_SYS_ATA_REG_OFFSET 0
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/* Offset for alternate registers */
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#define CONFIG_SYS_ATA_ALT_OFFSET 0x0200
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CONFIG_SYS_DCACHE_SIZE 16384
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#define CONFIG_SYS_ICACHE_SIZE 16384
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define GPIO_CACONFIG (1<<0)
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#define GPIO_DPACONFIG (1<<6)
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#define GPIO_ERESET (1<<11)
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#define GPIO_EEDQ (1<<17)
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#define GPIO_WDI (1<<18)
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#define GPIO_RJ1LY (1<<22)
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#define GPIO_RJ1LG (1<<23)
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#define GPIO_LEDCLK (1<<29)
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#define GPIO_LEDD (1<<30)
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#define GPIO_CPU_LED (1<<31)
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#endif /* __CONFIG_H */
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