mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-03-14 13:57:00 +00:00
142f92bf04
Fill the MADT table in the GIC driver and armv8 CPU driver to
drop SoC specific code. While the GIC only needs devicetree
data, the CPU driver needs additional information stored in
the cpu_plat struct.
While on it update the only board making use of the existing
drivers and writing ACPI MADT in mainboard code.
TEST: Booted on QEMU sbsa-ref using GICV3 driver model generated MADT.
Booted on QEMU raspb4 using GICV2 driver model generated MADT.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
48 lines
1.3 KiB
Text
48 lines
1.3 KiB
Text
config CPU
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bool "Enable CPU drivers using Driver Model"
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help
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This allows drivers to be provided for CPUs and their type to be
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specified in the board's device tree. For boards which support
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multiple CPUs, then normally have to be set up in U-Boot so that
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they can work correctly in the OS. This provides a framework for
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finding out information about available CPUs and making changes.
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config CPU_IMX
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bool "Enable i.MX CPU driver"
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depends on CPU && ARM64
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help
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Support CPU cores for SoCs of the i.MX series.
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config CPU_MPC83XX
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bool "Enable MPC83xx CPU driver"
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depends on CPU && MPC83xx
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select CLK_MPC83XX
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help
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Support CPU cores for SoCs of the MPC83xx series.
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config CPU_RISCV
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bool "Enable RISC-V CPU driver"
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depends on CPU && RISCV
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help
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Support CPU cores for RISC-V architecture.
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config CPU_ARMV8
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bool "Enable generic ARMv8 CPU driver"
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depends on CPU && ARM64
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select IRQ
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help
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Support CPU cores for armv8 architecture.
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config CPU_MICROBLAZE
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bool "Enable Microblaze CPU driver"
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depends on CPU && MICROBLAZE
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select DM_EVENT
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select XILINX_MICROBLAZE0_PVR
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help
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Support CPU cores for Microblaze architecture.
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config CPU_XTENSA
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bool "Enable Xtensa CPU driver"
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depends on CPU && XTENSA
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help
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Support CPU cores for Xtensa architecture.
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