// SPDX-License-Identifier: GPL-2.0 /* * dts file for Xilinx Versal a2197 RevA System Controller * * (C) Copyright 2019, Xilinx, Inc. * * Michal Simek */ /dts-v1/; #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" #include #include / { model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */ compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA", "xlnx,zynqmp-a2197", "xlnx,zynqmp"; aliases { ethernet0 = &gem0; i2c0 = &i2c0; i2c1 = &i2c1; mmc0 = &sdhci0; mmc1 = &sdhci1; nvmem0 = &eeprom; rtc0 = &rtc; serial0 = &uart0; serial1 = &uart1; serial2 = &dcc; usb0 = &usb0; usb1 = &usb1; }; chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; si5332_1: si5332_1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; si5332_2: si5332_2 { /* clk1_usb - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; }; &sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */ status = "okay"; non-removable; disable-wp; bus-width = <8>; xlnx,mio-bank = <0>; }; &uart0 { /* uart0 MIO38-39 */ status = "okay"; }; &uart1 { /* uart1 MIO40-41 */ status = "okay"; }; &sdhci1 { /* sd1 MIO45-51 cd in place */ status = "okay"; no-1-8-v; disable-wp; xlnx,mio-bank = <1>; }; &psgtr { status = "okay"; /* sgmii, usb3 */ clocks = <&si5332_1>, <&si5332_2>; clock-names = "ref0", "ref1"; }; &gem0 { status = "okay"; phy-handle = <&phy0>; phy-mode = "sgmii"; /* DTG generates this properly 1512 */ is-internal-pcspma; mdio: mdio { #address-cells = <1>; #size-cells = <0>; /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */ phy0: ethernet-phy@0 { reg = <0>; }; }; }; &gpio { status = "okay"; gpio-line-names = "", "", "", "", "", /* 0 - 4 */ "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */ "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */ "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */ "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */ "", "", "", "", "", /* 25 - 29 */ "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */ "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */ "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */ "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */ "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */ "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */ "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */ "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */ "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */ "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */ "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */ "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */ "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */ "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */ "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */ "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */ "", "", "", "", "", /* 150 - 154 */ "", "", "", "", "", /* 155 - 159 */ "", "", "", "", "", /* 160 - 164 */ "", "", "", "", "", /* 165 - 169 */ "", "", "", ""; /* 170 - 173 */ }; &i2c0 { /* MIO 34-35 - can't stay here */ status = "okay"; clock-frequency = <400000>; i2c-mux@74 { /* u33 */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; reg = <0x74>; /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */ i2c@0 { /* PMBUS1 */ #address-cells = <1>; #size-cells = <0>; reg = <0>; /* On connector J98 */ reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x7>; regulator-name = "reg_vcc_fmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2600000>; /* enable-gpio = <&gpio0 23 0x4>; optional */ }; reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x8>; }; reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x9>; }; reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0xa>; }; reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */ compatible = "ti,tps53681", "ti,tps53679"; reg = <0x60>; /* vccint, vcc_io_soc */ }; }; i2c@1 { /* PMBUS1_INA226 */ #address-cells = <1>; #size-cells = <0>; reg = <1>; /* FIXME check alerts coming to SC */ vcc_fmc: ina226@42 { /* u81 */ compatible = "ti,ina226"; reg = <0x42>; shunt-resistor = <5000>; }; vcc_ram: ina226@43 { /* u82 */ compatible = "ti,ina226"; reg = <0x43>; shunt-resistor = <5000>; }; vcc_pslp: ina226@44 { /* u84 */ compatible = "ti,ina226"; reg = <0x44>; shunt-resistor = <5000>; }; vcc_psfp: ina226@45 { /* u87 */ compatible = "ti,ina226"; reg = <0x45>; shunt-resistor = <5000>; }; }; i2c@2 { /* PMBUS2 */ #address-cells = <1>; #size-cells = <0>; reg = <2>; /* On connector J104 */ reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0xd>; }; reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0xe>; }; reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0xf>; }; reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x10>; }; reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x11>; }; reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x12>; }; reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x13>; }; reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x14>; }; reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x15>; }; reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x16>; }; reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x17>; }; reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x19>; }; reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x1a>; }; reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x1b>; }; reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x1c>; }; reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x1d>; }; reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x1e>; }; reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */ compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */ reg = <0x1f>; }; }; i2c@3 { /* PMBUS2_INA226 */ #address-cells = <1>; #size-cells = <0>; reg = <3>; /* FIXME check alerts coming to SC */ vccaux: ina226@40 { /* u89 */ compatible = "ti,ina226"; reg = <0x40>; shunt-resistor = <5000>; }; vccaux_fmc: ina226@41 { /* u91 */ compatible = "ti,ina226"; reg = <0x41>; shunt-resistor = <5000>; }; vcco_500: ina226@42 { /* u92 */ compatible = "ti,ina226"; reg = <0x42>; shunt-resistor = <5000>; }; vcco_501: ina226@43 { /* u94 */ compatible = "ti,ina226"; reg = <0x43>; shunt-resistor = <5000>; }; vcco_502: ina226@44 { /* u96 */ compatible = "ti,ina226"; reg = <0x44>; shunt-resistor = <5000>; }; vcco_503: ina226@45 { /* u98 */ compatible = "ti,ina226"; reg = <0x45>; shunt-resistor = <5000>; }; vcc_1v8: ina226@46 { /* u100 */ compatible = "ti,ina226"; reg = <0x46>; shunt-resistor = <5000>; }; vcc_3v3: ina226@47 { /* u103 */ compatible = "ti,ina226"; reg = <0x47>; shunt-resistor = <5000>; }; vcc_1v2_ddr4: ina226@48 { /* u105 */ compatible = "ti,ina226"; reg = <0x48>; shunt-resistor = <1000>; }; vcc1v1_lp4: ina226@49 { /* u107 */ compatible = "ti,ina226"; reg = <0x49>; shunt-resistor = <5000>; }; vadj_fmc: ina226@4a { /* u110 */ compatible = "ti,ina226"; reg = <0x4a>; shunt-resistor = <5000>; }; mgtyavcc: ina226@4b { /* u112 */ compatible = "ti,ina226"; reg = <0x4b>; shunt-resistor = <1000>; }; mgtyavtt: ina226@4c { /* u113 */ compatible = "ti,ina226"; reg = <0x4c>; shunt-resistor = <1000>; }; mgtyvccaux: ina226@4d { /* u116 */ compatible = "ti,ina226"; reg = <0x4d>; shunt-resistor = <5000>; }; vcc_bat: ina226@4e { /* u12 */ compatible = "ti,ina226"; reg = <0x4e>; shunt-resistor = <10000000>; /* 10 ohm */ }; }; i2c@4 { /* LP_I2C_SM */ #address-cells = <1>; #size-cells = <0>; reg = <4>; /* connected to J212G */ /* zynqmp sm alert or samtec J212H */ }; /* 5-7 unused */ }; }; &i2c1 { /* i2c1 MIO 36-37 */ status = "okay"; clock-frequency = <400000>; /* Must be enabled via J242 */ eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */ compatible = "atmel,24c02"; reg = <0x51>; }; i2c-mux@74 { /* u35 */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; reg = <0x74>; /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */ dc_i2c: i2c@0 { /* DC_I2C */ #address-cells = <1>; #size-cells = <0>; reg = <0>; /* Use for storing information about SC board */ eeprom: eeprom@54 { /* u34 - m24128 16kB */ compatible = "st,24c128", "atmel,24c128"; reg = <0x54>; }; si570_ref_clk: clock-generator@5d { /* u32 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x5d>; /* 570JAC000900DG */ temperature-stability = <50>; factory-fout = <33333333>; clock-frequency = <33333333>; clock-output-names = "ref_clk"; silabs,skip-recall; }; /* Connection via Samtec J212D */ /* Use for storing information about X-PRC card */ x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */ compatible = "atmel,24c02"; reg = <0x52>; }; /* Use for setting up certain features on X-PRC card */ x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */ compatible = "nxp,pca9534"; reg = <0x22>; gpio-controller; /* IRQ not connected */ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; gtr-sel0 { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; gtr-sel1 { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; gtr-sel2 { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; gtr-sel3 { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ line-name = "sw4_4"; }; }; }; i2c@1 { /* FMCP1_IIC */ #address-cells = <1>; #size-cells = <0>; reg = <1>; /* FIXME connection to Samtec J51C */ /* expected eeprom 0x50 SE cards */ }; i2c@2 { /* FMCP2_IIC */ #address-cells = <1>; #size-cells = <0>; reg = <2>; /* FIXME connection to Samtec J53C */ /* expected eeprom 0x50 SE cards */ }; i2c@3 { /* DDR4_DIMM1 */ #address-cells = <1>; #size-cells = <0>; reg = <3>; si570_ddr_dimm1: clock-generator@60 { /* u2 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x60>; /* 570BAB000299DG */ temperature-stability = <50>; factory-fout = <200000000>; clock-frequency = <200000000>; clock-output-names = "si570_ddrdimm1_clk"; }; /* 0x50 SPD? */ }; i2c@4 { /* DDR4_DIMM2 */ #address-cells = <1>; #size-cells = <0>; reg = <4>; si570_ddr_dimm2: clock-generator@60 { /* u3 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x60>; /* 570BAB000299DG */ temperature-stability = <50>; factory-fout = <200000000>; clock-frequency = <200000000>; clock-output-names = "si570_ddrdimm2_clk"; }; /* 0x50 SPD? */ }; i2c@5 { /* LPDDR4_SI570_CLK */ #address-cells = <1>; #size-cells = <0>; reg = <5>; si570_lpddr4: clock-generator@60 { /* u4 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x60>; /* 570BAB000299DG */ temperature-stability = <50>; factory-fout = <200000000>; clock-frequency = <200000000>; clock-output-names = "si570_lpddr4_clk"; }; }; i2c@6 { /* HSDP_SI570 */ #address-cells = <1>; #size-cells = <0>; reg = <6>; si570_hsdp: clock-generator@60 { /* u5 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x60>; /* 570JAC000900DG */ temperature-stability = <50>; factory-fout = <156250000>; clock-frequency = <156250000>; clock-output-names = "si570_hsdp_clk"; }; }; i2c@7 { /* PCIE_CLK */ #address-cells = <1>; #size-cells = <0>; reg = <7>; /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */ /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ clock_8t49n287: clock-generator@60 { /* u39 8T49N240 - pcie clocking 3 */ #clock-cells = <1>; /* author David Cater */ compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ reg = <0x60>; /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ }; }; }; }; &usb0 { status = "okay"; phy-names = "usb3-phy"; phys = <&psgtr 1 PHY_TYPE_USB3 0 1>; }; &dwc3_0 { status = "okay"; dr_mode = "peripheral"; snps,dis_u2_susphy_quirk; snps,dis_u3_susphy_quirk; maximum-speed = "super-speed"; }; &usb1 { status = "okay"; }; &dwc3_1 { /delete-property/ phy-names ; /delete-property/ phys ; dr_mode = "host"; maximum-speed = "high-speed"; snps,dis_u2_susphy_quirk ; snps,dis_u3_susphy_quirk ; status = "okay"; }; &xilinx_ams { status = "okay"; }; &ams_ps { status = "okay"; }; &ams_pl { status = "okay"; };