/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2012 Atmel Corporation * * Configuation settings for the AT91SAM9X5EK board. */ #ifndef __CONFIG_H__ #define __CONFIG_H__ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE /* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) * NB: in this case, USB 1.1 devices won't be recognized. */ /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* DataFlash */ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 #endif /* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 #endif #endif #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_BOOTCOMMAND "nand read " \ "0x22000000 0x200000 0x600000; " \ "nand read 0x21000000 0x180000 0x20000; " \ "bootz 0x22000000 - 0x21000000" #elif defined(CONFIG_SPI_BOOT) /* bootstrap + u-boot + env + linux in spi flash */ #define CONFIG_BOOTCOMMAND "sf probe 0; " \ "sf read 0x22000000 0x100000 0x300000; " \ "bootm 0x22000000" #elif defined(CONFIG_SYS_USE_DATAFLASH) /* bootstrap + u-boot + env + linux in data flash */ #define CONFIG_BOOTCOMMAND "sf probe 0; " \ "sf read 0x22000000 0x84000 0x294000; " \ "bootm 0x22000000" #endif /* SPL */ #define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 #define CONFIG_SYS_MONITOR_LEN (512 << 10) #define CONFIG_SYS_MASTER_CLOCK 132096000 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 #ifdef CONFIG_SD_BOOT #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 #endif