// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2019, 2021 NXP */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include DECLARE_GLOBAL_DATA_PTR; int spl_board_boot_device(enum boot_device boot_dev_spl) { switch (boot_dev_spl) { case USB_BOOT: return BOOT_DEVICE_BOARD; case SD2_BOOT: case MMC2_BOOT: return BOOT_DEVICE_MMC1; case SD3_BOOT: case MMC3_BOOT: return BOOT_DEVICE_MMC2; case QSPI_BOOT: return BOOT_DEVICE_NOR; default: return BOOT_DEVICE_NONE; } } static void spl_dram_init(void) { ddr_init(&dram_timing); } void spl_board_init(void) { arch_misc_init(); } #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { /* Just empty function now - can't decide what to choose */ debug("%s: %s\n", __func__, name); return 0; } #endif static int power_init_board(void) { struct udevice *dev; int ret; ret = pmic_get("pca9450@25", &dev); if (ret == -ENODEV) { puts("No pmic\n"); return 0; } if (ret != 0) return ret; /* BUCKxOUT_DVS0/1 control BUCK123 output */ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); /* Buck 1 DVS control through PMIC_STBY_REQ */ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); /* Set DVS1 to 0.8v for suspend */ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10); /* increase VDD_DRAM to 0.95v for 3Ghz DDR */ pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C); /* VDD_DRAM needs off in suspend, set B1_ENMODE=10 (ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L) */ pmic_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a); /* set VDD_SNVS_0V8 from default 0.85V */ pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0); return 0; } void board_init_f(ulong dummy) { struct udevice *dev; int ret; arch_cpu_init(); init_uart_clk(1); timer_init(); /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); hang(); } ret = uclass_get_device_by_name(UCLASS_CLK, "clock-controller@30380000", &dev); if (ret < 0) { printf("Failed to find clock node. Check device tree\n"); hang(); } preloader_console_init(); enable_tzc380(); power_init_board(); /* DDR initialization */ spl_dram_init(); board_init_r(NULL, 0); }