// SPDX-License-Identifier: GPL-2.0+
/*
 * dts file for Xilinx ZynqMP ZCU100 revC
 *
 * (C) Copyright 2016 - 2021, Xilinx, Inc.
 *
 * Michal Simek <michal.simek@xilinx.com>
 * Nathalie Chan King Choy
 */

/dts-v1/;

#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
#include <dt-bindings/phy/phy.h>

/ {
	model = "ZynqMP ZCU100 RevC";
	compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";

	aliases {
		gpio0 = &gpio;
		i2c0 = &i2c1;
		rtc0 = &rtc;
		serial0 = &uart1;
		serial1 = &uart0;
		serial2 = &dcc;
		spi0 = &spi0;
		spi1 = &spi1;
		usb0 = &usb0;
		usb1 = &usb1;
		mmc0 = &sdhci0;
		mmc1 = &sdhci1;
	};

	chosen {
		bootargs = "earlycon";
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x80000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		autorepeat;
		sw4 {
			label = "sw4";
			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			wakeup-source;
			autorepeat;
		};
	};

	iio-hwmon {
		compatible = "iio-hwmon";
		io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
			      <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
			      <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
			      <&xilinx_ams 9>, <&xilinx_ams 10>,
			      <&xilinx_ams 11>, <&xilinx_ams 12>;
	};

	leds {
		compatible = "gpio-leds";
		led-ds2 {
			label = "ds2";
			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-ds3 {
			label = "ds3";
			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy0tx"; /* WLAN tx */
			default-state = "off";
		};

		led-ds4 {
			label = "ds4";
			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy0rx"; /* WLAN rx */
			default-state = "off";
		};

		led-ds5 {
			label = "ds5";
			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "bluetooth-power";
		};

		vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
			label = "vbus_det";
			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	ltc2954: ltc2954 { /* U7 */
		compatible = "lltc,ltc2954", "lltc,ltc2952";
		status = "disabled";
		trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
		/* If there is HW watchdog on mezzanine this signal should be connected there */
		watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
		kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
	};

	wmmcsdio_fixed: fixedregulator-mmcsdio {
		compatible = "regulator-fixed";
		regulator-name = "wmmcsdio_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};

	sdio_pwrseq: sdio-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
		post-power-on-delay-ms = <10>;
	};

	ina226 {
		compatible = "iio-hwmon";
		io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
	};

	si5335_0: si5335_0 { /* clk0_usb - u23 */
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
	};

	si5335_1: si5335_1 { /* clk1_dp - u23 */
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
	};
};

&dcc {
	status = "okay";
};

&gpio {
	status = "okay";
	gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
			  "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
			  "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
			  "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
			  "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
			  "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
			  "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
			  "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
			  "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
			  "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
			  "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
			  "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
			  "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
			  "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
			  "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
			  "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
			  "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "", "", "", "", "", "", "",
			  "", "", "", "";
};

&gpu {
	status = "okay";
};

&i2c1 {
	status = "okay";
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1_default>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;
	scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
	clock-frequency = <100000>;
	i2c-mux@75 { /* u11 */
		compatible = "nxp,pca9548";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x75>;
		i2csw_0: i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
			label = "LS-I2C0";
		};
		i2csw_1: i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
			label = "LS-I2C1";
		};
		i2csw_2: i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;
			label = "HS-I2C2";
		};
		i2csw_3: i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;
			label = "HS-I2C3";
		};
		i2csw_4: i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;

			pmic: pmic@5e { /* Custom TI PMIC u33 */
				compatible = "ti,tps65086";
				reg = <0x5e>;
				interrupt-parent = <&gpio>;
				interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
				#gpio-cells = <2>;
				gpio-controller;
			};
		};
		i2csw_5: i2c@5 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <5>;
			/* PS_PMBUS */
			u35: ina226@40 { /* u35 */
				compatible = "ti,ina226";
				#io-channel-cells = <1>;
				reg = <0x40>;
				shunt-resistor = <10000>;
				/* MIO31 is alert which should be routed to PMUFW */
			};
		};
		i2csw_6: i2c@6 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <6>;
			/*
			 * Not Connected
			 */
		};
		i2csw_7: i2c@7 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <7>;
			/*
			 * usb5744 (DNP) - U5
			 * 100kHz - this is default freq for us
			 */
		};
	};
};

&pinctrl0 {
	status = "okay";
	pinctrl_i2c1_default: i2c1-default {
		mux {
			groups = "i2c1_1_grp";
			function = "i2c1";
		};

		conf {
			groups = "i2c1_1_grp";
			bias-pull-up;
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};
	};

	pinctrl_i2c1_gpio: i2c1-gpio {
		mux {
			groups = "gpio0_4_grp", "gpio0_5_grp";
			function = "gpio0";
		};

		conf {
			groups = "gpio0_4_grp", "gpio0_5_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};
	};

	pinctrl_sdhci0_default: sdhci0-default {
		mux {
			groups = "sdio0_3_grp";
			function = "sdio0";
		};

		conf {
			groups = "sdio0_3_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
			bias-disable;
		};

		mux-cd {
			groups = "sdio0_cd_0_grp";
			function = "sdio0_cd";
		};

		conf-cd {
			groups = "sdio0_cd_0_grp";
			bias-high-impedance;
			bias-pull-up;
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};
	};

	pinctrl_sdhci1_default: sdhci1-default {
		mux {
			groups = "sdio1_2_grp";
			function = "sdio1";
		};

		conf {
			groups = "sdio1_2_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
			bias-disable;
		};
	};

	pinctrl_spi0_default: spi0-default {
		mux {
			groups = "spi0_3_grp";
			function = "spi0";
		};

		conf {
			groups = "spi0_3_grp";
			bias-disable;
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};

		mux-cs {
			groups = "spi0_ss_9_grp";
			function = "spi0_ss";
		};

		conf-cs {
			groups = "spi0_ss_9_grp";
			bias-disable;
		};

	};

	pinctrl_spi1_default: spi1-default {
		mux {
			groups = "spi1_0_grp";
			function = "spi1";
		};

		conf {
			groups = "spi1_0_grp";
			bias-disable;
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};

		mux-cs {
			groups = "spi1_ss_0_grp";
			function = "spi1_ss";
		};

		conf-cs {
			groups = "spi1_ss_0_grp";
			bias-disable;
		};

	};

	pinctrl_uart0_default: uart0-default {
		mux {
			groups = "uart0_0_grp";
			function = "uart0";
		};

		conf {
			groups = "uart0_0_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};

		conf-rx {
			pins = "MIO3";
			bias-high-impedance;
		};

		conf-tx {
			pins = "MIO2";
			bias-disable;
		};
	};

	pinctrl_uart1_default: uart1-default {
		mux {
			groups = "uart1_0_grp";
			function = "uart1";
		};

		conf {
			groups = "uart1_0_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};

		conf-rx {
			pins = "MIO1";
			bias-high-impedance;
		};

		conf-tx {
			pins = "MIO0";
			bias-disable;
		};
	};

	pinctrl_usb0_default: usb0-default {
		mux {
			groups = "usb0_0_grp";
			function = "usb0";
		};

		conf {
			groups = "usb0_0_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};

		conf-rx {
			pins = "MIO52", "MIO53", "MIO55";
			bias-high-impedance;
		};

		conf-tx {
			pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
			       "MIO60", "MIO61", "MIO62", "MIO63";
			bias-disable;
		};
	};

	pinctrl_usb1_default: usb1-default {
		mux {
			groups = "usb1_0_grp";
			function = "usb1";
		};

		conf {
			groups = "usb1_0_grp";
			slew-rate = <SLEW_RATE_SLOW>;
			power-source = <IO_STANDARD_LVCMOS18>;
		};

		conf-rx {
			pins = "MIO64", "MIO65", "MIO67";
			bias-high-impedance;
		};

		conf-tx {
			pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
			       "MIO72", "MIO73", "MIO74", "MIO75";
			bias-disable;
		};
	};
};

&rtc {
	status = "okay";
};

/* SD0 only supports 3.3V, no level shifter */
&sdhci0 {
	status = "okay";
	no-1-8-v;
	disable-wp;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sdhci0_default>;
	xlnx,mio-bank = <0>;
};

&sdhci1 {
	status = "okay";
	bus-width = <0x4>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sdhci1_default>;
	xlnx,mio-bank = <0>;
	non-removable;
	disable-wp;
	cap-power-off-card;
	mmc-pwrseq = <&sdio_pwrseq>;
	vqmmc-supply = <&wmmcsdio_fixed>;
	#address-cells = <1>;
	#size-cells = <0>;
	wlcore: wifi@2 {
		compatible = "ti,wl1831";
		reg = <2>;
		interrupt-parent = <&gpio>;
		interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
	};
};

&psgtr {
	status = "okay";
	/* usb3, dp */
	clocks = <&si5335_0>, <&si5335_1>;
	clock-names = "ref0", "ref1";
};

&spi0 { /* Low Speed connector */
	status = "okay";
	label = "LS-SPI0";
	num-cs = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi0_default>;
};

&spi1 { /* High Speed connector */
	status = "okay";
	label = "HS-SPI1";
	num-cs = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1_default>;
};

&uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart0_default>;
	bluetooth {
		compatible = "ti,wl1831-st";
		enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
	};
};

&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1_default>;
};

/* ULPI SMSC USB3320 */
&usb0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb0_default>;
};

&dwc3_0 {
	status = "okay";
	dr_mode = "peripheral";
	phy-names = "usb3-phy";
	phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
	maximum-speed = "super-speed";
};

/* ULPI SMSC USB3320 */
&usb1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb1_default>;
};

&dwc3_1 {
	status = "okay";
	dr_mode = "host";
	phy-names = "usb3-phy";
	phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
	maximum-speed = "super-speed";
};

&watchdog0 {
	status = "okay";
};

&xilinx_ams {
	status = "okay";
};

&ams_ps {
	status = "okay";
};

&zynqmp_dpdma {
	status = "okay";
};

&zynqmp_dpsub {
	status = "okay";
	phy-names = "dp-phy0", "dp-phy1";
	phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
	       <&psgtr 0 PHY_TYPE_DP 1 1>;
};