// SPDX-License-Identifier: GPL-2.0+ OR MIT // // Device Tree Source for UniPhier LD20 Reference Board // // Copyright (C) 2015-2016 Socionext Inc. // Author: Masahiro Yamada <yamada.masahiro@socionext.com> /dts-v1/; #include "uniphier-ld20.dtsi" #include "uniphier-ref-daughter.dtsi" #include "uniphier-support-card.dtsi" / { model = "UniPhier LD20 Reference Board"; compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20"; chosen { stdout-path = "serial0:115200n8"; }; aliases { serial0 = &serial0; serial1 = &serialsc; serial2 = &serial2; serial3 = &serial3; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; ethernet0 = ð }; memory@80000000 { device_type = "memory"; reg = <0 0x80000000 0 0xc0000000>; }; }; ðsc { interrupts = <0 8>; }; &serialsc { interrupts = <0 8>; }; &serial0 { status = "okay"; }; &gpio { xirq0 { gpio-hog; gpios = <UNIPHIER_GPIO_IRQ(0) 0>; input; }; }; &i2c0 { status = "okay"; }; ð { status = "okay"; phy-handle = <ðphy>; }; &mdio { ethphy: ethernet-phy@0 { reg = <0>; }; }; &pinctrl_ether_rgmii { tx { pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1", "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL"; drive-strength = <9>; }; }; &usb { status = "okay"; };