// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/ */ #include <dt-bindings/pinctrl/k3.h> #include <dt-bindings/net/ti-dp83867.h> / { chosen { stdout-path = "serial2:115200n8"; }; aliases { serial2 = &main_uart0; ethernet0 = &cpsw_port1; usb0 = &usb0; usb1 = &usb1; spi0 = &ospi0; spi1 = &ospi1; }; }; &cbass_main{ bootph-pre-ram; main_navss: bus@30800000 { bootph-pre-ram; }; }; &cbass_mcu { bootph-pre-ram; mcu_navss: bus@28380000 { bootph-pre-ram; ringacc@2b800000 { reg = <0x0 0x2b800000 0x0 0x400000>, <0x0 0x2b000000 0x0 0x400000>, <0x0 0x28590000 0x0 0x100>, <0x0 0x2a500000 0x0 0x40000>, <0x0 0x28440000 0x0 0x40000>; reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; bootph-pre-ram; ti,dma-ring-reset-quirk; }; dma-controller@285c0000 { reg = <0x0 0x285c0000 0x0 0x100>, <0x0 0x284c0000 0x0 0x4000>, <0x0 0x2a800000 0x0 0x40000>, <0x0 0x284a0000 0x0 0x4000>, <0x0 0x2aa00000 0x0 0x40000>, <0x0 0x28400000 0x0 0x2000>; reg-names = "gcfg", "rchan", "rchanrt", "tchan", "tchanrt", "rflow"; bootph-pre-ram; }; }; }; &cbass_wakeup { bootph-pre-ram; chipid@43000014 { bootph-pre-ram; }; }; &secure_proxy_main { bootph-pre-ram; }; &dmsc { bootph-pre-ram; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; bootph-pre-ram; }; }; &k3_pds { bootph-pre-ram; }; &k3_clks { bootph-pre-ram; }; &k3_reset { bootph-pre-ram; }; &wkup_pmx0 { bootph-pre-ram; wkup_i2c0_pins_default { bootph-pre-ram; }; }; &main_pmx0 { bootph-pre-ram; usb0_pins_default: usb0_pins_default { pinctrl-single,pins = < AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ >; bootph-pre-ram; }; }; &main_uart0_pins_default { bootph-pre-ram; }; &main_pmx1 { bootph-pre-ram; }; &wkup_pmx0 { mcu-fss0-ospi0-pins-default { bootph-pre-ram; }; }; &main_uart0 { bootph-pre-ram; }; &main_mmc0_pins_default { bootph-pre-ram; }; &main_mmc1_pins_default { bootph-pre-ram; }; &sdhci0 { bootph-pre-ram; }; &sdhci1 { bootph-pre-ram; }; &davinci_mdio { phy0: ethernet-phy@0 { reg = <0>; /* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; }; }; &mcu_cpsw { reg = <0x0 0x46000000 0x0 0x200000>, <0x0 0x40f00200 0x0 0x2>; reg-names = "cpsw_nuss", "mac_efuse"; /delete-property/ ranges; cpsw-phy-sel@40f04040 { compatible = "ti,am654-cpsw-phy-sel"; reg= <0x0 0x40f04040 0x0 0x4>; reg-names = "gmii-sel"; }; }; &wkup_i2c0 { bootph-pre-ram; }; &usb1 { dr_mode = "peripheral"; }; &fss { bootph-pre-ram; }; &ospi0 { bootph-pre-ram; flash@0{ bootph-pre-ram; }; }; &dwc3_0 { status = "okay"; bootph-pre-ram; }; &usb0_phy { status = "okay"; bootph-pre-ram; }; &usb0 { pinctrl-names = "default"; pinctrl-0 = <&usb0_pins_default>; dr_mode = "peripheral"; bootph-pre-ram; }; &scm_conf { bootph-pre-ram; };