// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. */ #include / { #address-cells = <2>; #size-cells = <2>; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { compatible = "arm,cortex-a35"; device_type = "cpu"; reg = <0>; enable-method = "psci"; }; }; arm-pmu { compatible = "arm,cortex-a35-pmu"; interrupts = ; interrupt-affinity = <&cpu0>; interrupt-parent = <&intc>; }; arm_wdt: watchdog { compatible = "arm,smc-wdt"; arm,smc-id = <0xb200005a>; status = "disabled"; }; clocks { ck_flexgen_08: ck-flexgen-08 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <100000000>; }; ck_flexgen_51: ck-flexgen-51 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <200000000>; }; ck_icn_ls_mcu: ck-icn-ls-mcu { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <200000000>; }; }; firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; scmi { compatible = "linaro,scmi-optee"; #address-cells = <1>; #size-cells = <0>; linaro,optee-channel-id = <0>; scmi_clk: protocol@14 { reg = <0x14>; #clock-cells = <1>; }; scmi_reset: protocol@16 { reg = <0x16>; #reset-cells = <1>; }; }; }; intc: interrupt-controller@4ac00000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; #address-cells = <1>; interrupt-controller; reg = <0x0 0x4ac10000 0x0 0x1000>, <0x0 0x4ac20000 0x0 0x2000>, <0x0 0x4ac40000 0x0 0x2000>, <0x0 0x4ac60000 0x0 0x2000>; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; timer { compatible = "arm,armv8-timer"; interrupt-parent = <&intc>; interrupts = , , , ; always-on; }; soc@0 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>; ranges = <0x0 0x0 0x0 0x80000000>; rifsc: rifsc-bus@42080000 { compatible = "simple-bus"; reg = <0x42080000 0x1000>; #address-cells = <1>; #size-cells = <1>; ranges; usart2: serial@400e0000 { compatible = "st,stm32h7-uart"; reg = <0x400e0000 0x400>; interrupts = ; clocks = <&ck_flexgen_08>; status = "disabled"; }; }; syscfg: syscon@44230000 { compatible = "st,stm32mp25-syscfg", "syscon"; reg = <0x44230000 0x10000>; }; pinctrl: pinctrl@44240000 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stm32mp257-pinctrl"; ranges = <0 0x44240000 0xa0400>; pins-are-numbered; gpioa: gpio@44240000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x0 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOA"; status = "disabled"; }; gpiob: gpio@44250000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x10000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOB"; status = "disabled"; }; gpioc: gpio@44260000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x20000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOC"; status = "disabled"; }; gpiod: gpio@44270000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x30000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOD"; status = "disabled"; }; gpioe: gpio@44280000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x40000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOE"; status = "disabled"; }; gpiof: gpio@44290000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x50000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOF"; status = "disabled"; }; gpiog: gpio@442a0000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x60000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOG"; status = "disabled"; }; gpioh: gpio@442b0000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x70000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOH"; status = "disabled"; }; gpioi: gpio@442c0000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x80000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOI"; status = "disabled"; }; gpioj: gpio@442d0000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0x90000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOJ"; status = "disabled"; }; gpiok: gpio@442e0000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0xa0000 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOK"; status = "disabled"; }; }; pinctrl_z: pinctrl@46200000 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stm32mp257-z-pinctrl"; ranges = <0 0x46200000 0x400>; pins-are-numbered; gpioz: gpio@46200000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; reg = <0 0x400>; clocks = <&ck_icn_ls_mcu>; st,bank-name = "GPIOZ"; st,bank-ioport = <11>; status = "disabled"; }; }; }; };