/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (c) 2004-2008 Texas Instruments * * (C) Copyright 2002 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { . = 0x00000000; . = ALIGN(4); .text : { *(.__image_copy_start) *(.vectors) CPUDIR/start.o (.text*) } /* This needs to come before *(.text*) */ .__efi_runtime_start : { *(.__efi_runtime_start) } .efi_runtime : { *(.text.efi_runtime*) *(.rodata.efi_runtime*) *(.data.efi_runtime*) } .__efi_runtime_stop : { *(.__efi_runtime_stop) } .text_rest : { *(.text*) } . = ALIGN(4); .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } . = ALIGN(4); .data : { *(.data*) } . = ALIGN(4); . = .; . = ALIGN(4); __u_boot_list : { KEEP(*(SORT(__u_boot_list*))); } . = ALIGN(4); .efi_runtime_rel_start : { *(.__efi_runtime_rel_start) } .efi_runtime_rel : { *(.rel*.efi_runtime) *(.rel*.efi_runtime.*) } .efi_runtime_rel_stop : { *(.__efi_runtime_rel_stop) } . = ALIGN(8); .image_copy_end : { *(.__image_copy_end) } .rel_dyn_start : { *(.__rel_dyn_start) } .rel.dyn : { *(.rel*) } .rel_dyn_end : { *(.__rel_dyn_end) } .end : { *(.__end) } _image_binary_end = .; /* * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c * __bss_base and __bss_limit are for linker only (overlay ordering) */ .bss_start __rel_dyn_start (OVERLAY) : { KEEP(*(.__bss_start)); __bss_base = .; } .bss __bss_base (OVERLAY) : { *(.bss*) . = ALIGN(8); __bss_limit = .; } .bss_end __bss_limit (OVERLAY) : { KEEP(*(.__bss_end)); } /* * Zynq needs to discard these sections because the user * is expected to pass this image on to tools for boot.bin * generation that require them to be dropped. */ /DISCARD/ : { *(.dynsym) } /DISCARD/ : { *(.dynbss*) } /DISCARD/ : { *(.dynstr*) } /DISCARD/ : { *(.dynamic*) } /DISCARD/ : { *(.plt*) } /DISCARD/ : { *(.interp*) } /DISCARD/ : { *(.gnu*) } /DISCARD/ : { *(.ARM.exidx*) } /DISCARD/ : { *(.gnu.linkonce.armexidx.*) } }