/* * Copyright 2017 Gateworks Corporation * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public * License along with this file; if not, write to the Free * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, * MA 02110-1301 USA * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include #include #include / { /* these are used by bootloader for disabling nodes */ aliases { led0 = &led0; led1 = &led1; led2 = &led2; mmc0 = &usdhc2; mmc1 = &usdhc3; ssi0 = &ssi1; usb0 = &usbotg; usb1 = &usbh1; }; chosen { stdout-path = &uart2; }; backlight-display { compatible = "pwm-backlight"; pwms = <&pwm4 0 5000000>; brightness-levels = < 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 >; default-brightness-level = <100>; }; backlight-keypad { compatible = "gpio-backlight"; gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; default-on; }; gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; user-pb { label = "user_pb"; gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; linux,code = ; }; user-pb1x { label = "user_pb1x"; linux,code = ; interrupt-parent = <&gsc>; interrupts = <0>; }; key-erased { label = "key-erased"; linux,code = ; interrupt-parent = <&gsc>; interrupts = <1>; }; eeprom-wp { label = "eeprom_wp"; linux,code = ; interrupt-parent = <&gsc>; interrupts = <2>; }; tamper { label = "tamper"; linux,code = ; interrupt-parent = <&gsc>; interrupts = <5>; }; switch-hold { label = "switch_hold"; linux,code = ; interrupt-parent = <&gsc>; interrupts = <7>; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; led0: user1 { label = "user1"; gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ default-state = "on"; linux,default-trigger = "heartbeat"; }; led1: user2 { label = "user2"; gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ default-state = "off"; }; led2: user3 { label = "user3"; gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ default-state = "off"; }; }; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x40000000>; }; pps { compatible = "pps-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pps>; gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; }; reg_2p5v: regulator-2p5v { compatible = "regulator-fixed"; regulator-name = "2P5V"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; reg_5p0v: regulator-5p0v { compatible = "regulator-fixed"; regulator-name = "5P0V"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; }; reg_12p0v: regulator-12p0v { compatible = "regulator-fixed"; regulator-name = "12P0V"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_1p4v: regulator-vddsoc { compatible = "regulator-fixed"; regulator-name = "vdd_soc"; regulator-min-microvolt = <1400000>; regulator-max-microvolt = <1400000>; regulator-always-on; }; reg_usb_h1_vbus: regulator-usb-h1-vbus { compatible = "regulator-fixed"; regulator-name = "usb_h1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; }; reg_usb_otg_vbus: regulator-usb-otg-vbus { compatible = "regulator-fixed"; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; enable-active-high; }; sound { compatible = "fsl,imx6q-ventana-sgtl5000", "fsl,imx-audio-sgtl5000"; model = "sgtl5000-audio"; ssi-controller = <&ssi1>; audio-codec = <&sgtl5000>; audio-routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; mux-int-port = <1>; mux-ext-port = <4>; }; }; &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; &ecspi3 { cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3>; status = "okay"; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan>; status = "okay"; }; &clks { assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>; assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, <&clks IMX6QDL_CLK_PLL3_USB_OTG>; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; phy-reset-duration = <10>; phy-reset-post-delay = <100>; status = "okay"; }; &hdmi { ddc-i2c-bus = <&i2c3>; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; gsc: gsc@20 { compatible = "gw,gsc"; reg = <0x20>; interrupt-parent = <&gpio1>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; #size-cells = <0>; adc { compatible = "gw,gsc-adc"; #address-cells = <1>; #size-cells = <0>; channel@0 { gw,mode = <0>; reg = <0x00>; label = "temp"; }; channel@2 { gw,mode = <1>; reg = <0x02>; label = "vdd_vin"; }; channel@5 { gw,mode = <1>; reg = <0x05>; label = "vdd_3p3"; }; channel@8 { gw,mode = <1>; reg = <0x08>; label = "vdd_bat"; }; channel@b { gw,mode = <1>; reg = <0x0b>; label = "vdd_5p0"; }; channel@e { gw,mode = <1>; reg = <0xe>; label = "vdd_arm"; }; channel@11 { gw,mode = <1>; reg = <0x11>; label = "vdd_soc"; }; channel@14 { gw,mode = <1>; reg = <0x14>; label = "vdd_3p0"; }; channel@17 { gw,mode = <1>; reg = <0x17>; label = "vdd_1p5"; }; channel@1d { gw,mode = <1>; reg = <0x1d>; label = "vdd_1p8"; }; channel@20 { gw,mode = <1>; reg = <0x20>; label = "vdd_an1"; }; channel@23 { gw,mode = <1>; reg = <0x23>; label = "vdd_2p5"; }; channel@26 { gw,mode = <1>; reg = <0x26>; label = "vdd_gps"; }; channel@29 { gw,mode = <1>; reg = <0x29>; label = "vdd_an2"; }; }; }; gsc_gpio: gpio@23 { compatible = "nxp,pca9555"; reg = <0x23>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gsc>; interrupts = <4>; }; eeprom1: eeprom@50 { compatible = "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; eeprom2: eeprom@51 { compatible = "atmel,24c02"; reg = <0x51>; pagesize = <16>; }; eeprom3: eeprom@52 { compatible = "atmel,24c02"; reg = <0x52>; pagesize = <16>; }; eeprom4: eeprom@53 { compatible = "atmel,24c02"; reg = <0x53>; pagesize = <16>; }; ds1672: rtc@68 { compatible = "dallas,ds1672"; reg = <0x68>; }; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; #sound-dai-cells = <0>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_1p8v>; VDDIO-supply = <®_3p3v>; }; magn@1c { compatible = "st,lsm9ds1-magn"; reg = <0x1c>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mag>; interrupt-parent = <&gpio5>; interrupts = <9 IRQ_TYPE_EDGE_RISING>; }; tca8418: keypad@34 { compatible = "ti,tca8418"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_keypad>; reg = <0x34>; interrupt-parent = <&gpio5>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0) MATRIX_KEY(0x00, 0x00, BTN_1) MATRIX_KEY(0x01, 0x01, BTN_2) MATRIX_KEY(0x01, 0x00, BTN_3) MATRIX_KEY(0x02, 0x00, BTN_4) MATRIX_KEY(0x00, 0x03, BTN_5) MATRIX_KEY(0x00, 0x02, BTN_6) MATRIX_KEY(0x01, 0x03, BTN_7) MATRIX_KEY(0x01, 0x02, BTN_8) MATRIX_KEY(0x02, 0x02, BTN_9) >; keypad,num-rows = <4>; keypad,num-columns = <4>; }; ltc3676: pmic@3c { compatible = "lltc,ltc3676"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; reg = <0x3c>; interrupt-parent = <&gpio1>; interrupts = <8 IRQ_TYPE_EDGE_FALLING>; regulators { /* VDD_DDR (1+R1/R2 = 2.105) */ reg_vdd_ddr: sw2 { regulator-name = "vddddr"; regulator-min-microvolt = <868310>; regulator-max-microvolt = <1684000>; lltc,fb-voltage-divider = <221000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_ARM (1+R1/R2 = 1.931) */ reg_vdd_arm: sw3 { regulator-name = "vddarm"; regulator-min-microvolt = <796551>; regulator-max-microvolt = <1544827>; lltc,fb-voltage-divider = <243000 261000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; linux,phandle = <®_vdd_arm>; }; /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ reg_1p8v: sw4 { regulator-name = "vdd1p8"; regulator-min-microvolt = <1033310>; regulator-max-microvolt = <2004000>; lltc,fb-voltage-divider = <301000 200000>; regulator-ramp-delay = <7000>; regulator-boot-on; regulator-always-on; }; /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */ reg_1p0v: ldo2 { regulator-name = "vdd1p0"; regulator-min-microvolt = <950000>; regulator-max-microvolt = <1050000>; lltc,fb-voltage-divider = <78700 200000>; regulator-boot-on; regulator-always-on; }; /* VDD_AUD_1P8: Audio codec */ reg_aud_1p8v: ldo3 { regulator-name = "vdd1p8a"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; }; /* VDD_HIGH (1+R1/R2 = 4.17) */ reg_3p0v: ldo4 { regulator-name = "vdd3p0"; regulator-min-microvolt = <3023250>; regulator-max-microvolt = <3023250>; lltc,fb-voltage-divider = <634000 200000>; regulator-boot-on; regulator-always-on; }; }; }; imu@6a { compatible = "st,lsm9ds1-imu"; reg = <0x6a>; st,drdy-int-pin = <1>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_imu>; interrupt-parent = <&gpio5>; interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; }; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; egalax_ts: touchscreen@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio5>; interrupts = <12 IRQ_TYPE_EDGE_FALLING>; wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; }; }; &ldb { fsl,dual-channel; status = "okay"; lvds-channel@0 { fsl,data-mapping = "spwg"; fsl,data-width = <18>; status = "okay"; display-timings { native-mode = <&timing0>; timing0: hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; hback-porch = <220>; hfront-porch = <40>; vback-porch = <21>; vfront-porch = <7>; hsync-len = <60>; vsync-len = <10>; }; }; }; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>; status = "okay"; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ status = "disabled"; }; &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ status = "disabled"; }; &pwm4 { #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; }; &ssi1 { status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; uart-has-rtscts; rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &uart5 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5>; status = "okay"; }; &usbotg { vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; dr_mode = "otg"; status = "okay"; }; &usbh1 { vbus-supply = <®_usb_h1_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbh1>; status = "okay"; }; &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; bus-width = <8>; vmmc-supply = <®_3p3v>; non-removable; status = "okay"; }; &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; vmmc-supply = <®_3p3v>; status = "okay"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; }; &iomuxc { pinctrl_audmux: audmuxgrp { fsl,pins = < /* AUD4 */ MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ /* AUD6 */ MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0 >; }; pinctrl_ecspi3: escpi3grp { fsl,pins = < MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ >; }; pinctrl_flexcan: flexcangrp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ >; }; pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */ MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */ MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */ >; }; pinctrl_imu: imugrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0 >; }; pinctrl_keypad: keypadgrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */ >; }; pinctrl_mag: maggrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */ >; }; pinctrl_pmic: pmicgrp { fsl,pins = < MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ >; }; pinctrl_pps: ppsgrp { fsl,pins = < MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 >; }; pinctrl_pwm4: pwm4grp { fsl,pins = < MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */ >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_uart5: uart5grp { fsl,pins = < MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 >; }; pinctrl_usbh1: usbh1grp { fsl,pins = < MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */ >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 >; }; pinctrl_usdhc3_100mhz: usdhc3grp100mhz { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 >; }; pinctrl_usdhc3_200mhz: usdhc3grp200mhz { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 >; }; pinctrl_wdog: wdoggrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 >; }; };