/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2016-2021 Intel Corporation */ #ifndef _SYSTEM_MANAGER_ARRIA10_H_ #define _SYSTEM_MANAGER_ARRIA10_H_ #define SYSMGR_A10_WDDBG 0x08 #define SYSMGR_A10_BOOTINFO 0x0c #define SYSMGR_A10_DMA 0x20 #define SYSMGR_A10_DMA_PERIPH 0x24 #define SYSMGR_A10_SDMMC 0x28 #define SYSMGR_A10_SDMMC_L3MASTER 0x2c #define SYSMGR_A10_EMAC_GLOBAL 0x40 #define SYSMGR_A10_EMAC0 0x44 #define SYSMGR_A10_EMAC1 0x48 #define SYSMGR_A10_EMAC2 0x4c #define SYSMGR_A10_FPGAINTF_EN_GLOBAL 0x60 #define SYSMGR_A10_FPGAINTF_EN0 0x64 #define SYSMGR_A10_FPGAINTF_EN1 0x68 #define SYSMGR_A10_FPGAINTF_EN2 0x6c #define SYSMGR_A10_FPGAINTF_EN3 0x70 #define SYSMGR_A10_ECC_INTMASK_VAL 0x90 #define SYSMGR_A10_ECC_INTMASK_SET 0x94 #define SYSMGR_A10_ECC_INTMASK_CLR 0x98 #define SYSMGR_A10_NOC_TIMEOUT 0xc0 #define SYSMGR_A10_NOC_IDLEREQ_SET 0xc4 #define SYSMGR_A10_NOC_IDLEREQ_CLR 0xc8 #define SYSMGR_A10_NOC_IDLEREQ_VAL 0xcc #define SYSMGR_A10_NOC_IDLEACK 0xd0 #define SYSMGR_A10_NOC_IDLESTATUS 0xd4 #define SYSMGR_A10_FPGA2SOC_CTRL 0xd8 #define SYSMGR_A10_ROMCODE_CTRL 0x204 #define SYSMGR_A10_ROMCODE_INITSWSTATE 0x20C #define SYSMGR_A10_ROMCODE_QSPIRESETCOMMAND 0x208 #define SYSMGR_A10_ISW_HANDOFF_BASE 0x230 #define SYSMGR_A10_ISW_HANDOFF_7 0x1c #define SYSMGR_SDMMC SYSMGR_A10_SDMMC #define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 #define SYSMGR_BOOTINFO_BSEL_SHIFT 12 #endif /* _SYSTEM_MANAGER_ARRIA10_H_ */