The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3399.
It provides the following feature set:
* up to 4GB DDR3
* on-module SPI-NOR flash
* on-module eMMC (with 8-bit interace)
* SD card (on a baseboad) via edge connector
* Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY
* HDMI/eDP/MIPI displays
* 2x MIPI-CSI
* USB
- 1x USB 3.0 dual-role (direct connection)
- 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub)
* on-module STM32 Cortex-M0 companion controller, implementing:
- low-power RTC functionality (ISL1208 emulation)
- fan controller (AMC6821 emulation)
- USB<->CAN bridge controller
Note that we use a multi-payload FIT image for booting and have
Cortex-M0 payload in a separate subimage: we thus rely on the FIT
image loader to put it into the SRAM region that ATF expects it in.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixed build warning on puma-rk3399:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
An earlier upstream change contained an unconditional debug message
which would show up as a message similar to the following in the
U-Boot startup (after the ATF and before the U-Boot banner):
time 159f019, 0
This commit removes this message (instead of making if conditional on
being a debug-build), as it doesn't pertain to any initialisation done
in this file.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
RK3399 support DDR3, LPDDR3, DDR4 sdram, this patch is porting from
coreboot, support 4GB lpddr3 in this version.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Added rockchip: tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
rk3399 has different syscon registers which may used in spl,
add to support rk3399 spl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
rk3399 has two clock-controller: cru and pmucru, update the
rockchip_get_crui() API, and rockchip_get_clk() do not used for
other module.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The Clock Multiplier in rk3399 EMMC programmable clock generator
is broken, we can remove its support from SoC GRF register.
Without this patch, rk3399 emmc driver is not work after below patch
applied:
6dffdbc mmc: sdhci: Add the programmable clock mode support
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
pmugrf is a module like grf which contain some of the iomux registers
and other registers.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
RK3399 is a SoC from Rockchip with dual-core Cortex-A72
and quad-core Cortex-A53 CPU. It supports two USB3.0
type-C ports and two USB2.0 EHCI ports. Other interfaces
are very much like RK3288, the DRAM are 32bit width address
and support address from 0 to 4GB-128MB range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
