Commit graph

199 commits

Author SHA1 Message Date
Greg Gallagher
786f35b619 ARM: at91: spl: add spl_early_init for sama5d2 platforms
The dm root node is needed early in the spl to allow the timer to be
used.  This change calls spl_early_init to initialize the dm root node.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Kai Stuhlemmer (ebee Engineering)
3270c47b39 sam9x60.h: Fix Galois Field Table offsets
Because ATMEL_BASE_ROM is defined to 0x100000, it already points
to the begin of the index table for 512 byte sectors correction.
Thus its offset must be zero and the index of the table for 1024
byte sectors must start at offset 0x8000.

Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de>
[ta: update commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Tudor Ambarus
786f888b74 sama5d3: Fix Galois Field Table offsets
Offsets are described in the datasheet at section:
"11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction".

For testing I "injected" bit flips into u-boot NAND memory area,
and then read back. PMECC could not correct the errors. With the
offsets updated everything is fine.

Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
417eca09bf pinctrl: at91-pio4: implement drive strength support
Implement drive strength support, by preserving the same bindings
as in Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Tom Rini
996f217ea3 First set of u-boot-atmel features for 2021.04 cycle
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Merge tag 'u-boot-atmel-2021.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2021.04 cycle

This feature set includes the new board SAMA7G5 EK, the new evaluation
kit for Microchip AT91 SAMA7G5 SoC . The current board support includes
two configurations for booting from eMMC (SDMMC0), SD-Card (SDMMC1), and
support for two Ethernet interfaces.
2021-01-12 09:32:20 -05:00
Eugen Hristev
1d463d6735 board: atmel: sama7g5ek: add initial support for sama7g5ek
Add initial support for sama7g5 evaluation kit board.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
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Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
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Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
20e442ab2d dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Eugen Hristev
6c5f79d0ce ARM: mach-at91: fix timer.o compile condition
The AT91 architecture now has two possible timer blocks, the old PIT timer
and the new PIT64B.
The timer.c file has an old non DM driver that works for platforms
that do not use the ATMEL_PIT_TIMER DM-based driver.
Update the Makefile to select this old driver in case neither of the
ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected.

Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-26 10:12:47 +02:00
Nicolas Ferre
62495e2cdb ARM: at91: armv7: sama7g5 uses CCF clock driver
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older
at91 clock.c driver. Remove it from the compilation list and adapt cpu.c
arch_cpu_init() to avoid calling at91_clock_init() which is wrong
anyway.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-11-26 10:12:47 +02:00
Nicolas Ferre
db228c5b46 ARM: at91: Add chip ID for SAM9X60 SiP
SAM9X60 SiP (System in Package) are added for SoC identification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2020-10-19 09:19:53 +03:00
Eugen Hristev
558378a4cd ARM: mach-at91: add support for new SoC sama7g5
Add support for new SoC sama7g5

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25 10:39:22 +03:00
Eugen Hristev
919c4f3639 ARM: at91: common: guard ATMEL_PIT code by ifdef
Atmel PIT timer is not available for next products that
have another timer hardware block.
To be able to use the common at91 code, guard the code that uses PIT
by ifdefs.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-22 11:27:18 +03:00
Eugen Hristev
68d3ec599e board: atmel: common: introduce at91_set_eth1addr for second interface
We already have a function to retrieve the mac address from one EEPROM.
For boards with a second Ethernet interface, however, we would
require another EEPROM with a second unique MAC address.
Introduce at91_set_eth1addr which will look for a second EEPROM
and set the 'eth1addr' variable with the obtained MAC address.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-22 11:27:18 +03:00
Simon Glass
e6385c7e9c Makefile: Rename ALL-y to INPUTS-y
When binman is in use, most of the targets built by the Makefile are
inputs to binman. We then need a final rule to run binman to produce the
final outputs.

Rename the variable to indicate this, and add a new 'inputs' target.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Walter Lozano
e3e2470fdd drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.

In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Tom Rini
348d183e54 Convert CONFIG_AT91_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_AT91_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-26 10:29:04 -04:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
691d719db7 common: Drop init.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
b79fdc7697 common: Drop flash.h from common header
Move this uncommon header out of the common header.

Fix up some style problems in flash.h while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:53:28 -04:00
Simon Glass
a595a0e910 flash: Tidy up coding style for flash functions
Some functions use the wrong code style and generate checkpatch errors.
Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:53:28 -04:00
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Simon Glass
9a3b4ceb37 common: Move reset_cpu() to the CPU header
Move this function out of common.h and into a relevant header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:31 -05:00
Simon Glass
049f8d6f4a common: Move get_tbclk() to time.h
This function related to timer and most of the timer functions are in
time.h, so move this function there.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:30 -05:00
Tom Rini
ac0f978afd First set of u-boot-atmel features for 2020.04 cycle
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Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.04 cycle

This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07 08:44:56 -05:00
Tudor Ambarus
f10b4006a6 board: atmel: sama5d27_wlsom1_ek: Set ethaddr from spi-nor flash
The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-12-17 09:49:05 +02:00
Simon Glass
bcee8d6764 dm: gpio: Allow control of GPIO uclass in SPL
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.

Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.

Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.

This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 08:52:29 +08:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
1045315df0 common: Move get_ticks() function out of common.h
This function belongs in time.h so move it over and add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Simon Glass
2189d5f1e8 Move strtomhz() to vsprintf.h
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.

Use the vsprintf.h include file explicitly where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:09 -05:00
Tudor Ambarus
cd0fcf1965 ARM: at91: Add SFR definitions
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Tudor Ambarus
b96b175cbb ARM: at91: Rename sama5_sfr.h to at91_sfr.h
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Sandeep Sheriker Mallikarjun
51422665de board: atmel: Add sam9x60ek board
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.

Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
  One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Sandeep Sheriker Mallikarjun
9cf7f46307 ARM: at91: Add sam9x60 soc
Add new Microchip sam9x60 SoC based on an ARM926.

Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
c721c22a03 board: atmel: sama5d2_wlsom1_ek: add SPL support
Add support for SPL for this board: DRAM initialization, PMC initialization,
MMC boot.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
a34ae7cb46 ARM: at91: mpddrc: add lpddr2 initialization procedure
Implement the lpddr2 initialization procedure for at91 mpddrc multi-port
ddram controller.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
f64ec16f42 board: laird: wb50n: use configure_ddrcfg_input_buffers
Replace code with new function configure_ddrcfg_input_buffers from SFR
mach driver.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
b1c7b33be2 ARM: at91: sfr: implement DDR input buffers open function
Add a function in SFR implementation that will open the DDR input
buffers.
This can be called at DRAM initialization time.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Eugen Hristev
d231e37a20 ARM: at91: sfr: convert to Kconfig
This converts the at91 sfr to Kconfig

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Nicolas Ferre
44b5c40be3 board: atmel: add sama5d27_wlsom1_ek board
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-10-08 09:16:11 +03:00
Nicolas Ferre
00561e7d24 ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiP
The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC
identification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08 09:16:11 +03:00
Adam Ford
1bf330150c Convert CONFIG_ARCH_CPU_INIT to Kconfig
This converts the following to Kconfig:
   CONFIG_ARCH_CPU_INIT

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Felix Brack <fb@ltec.ch>
2019-08-25 19:32:55 -04:00
Tom Rini
eb53a18c9e First set of u-boot-atmel fixes for 2019.07 cycle
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Merge tag 'u-boot-atmel-fixes-2019.07-a' of git://git.denx.de/u-boot-atmel

First set of u-boot-atmel fixes for 2019.07 cycle
2019-06-10 09:41:00 -04:00
Eugen Hristev
0be07872e3 spl: at91: add support for SPL_AT91_MCK_BYPASS
By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.

Also created Kconfig for this specific configuration.
By default this is disabled.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-06-06 10:56:42 +03:00
Simon Goldschmidt
1b1d8c19f5 spl: fix linker size check off-by-one errors
This fixes SPL linker script size checks for 3 lds files where the size
checks were implemented as "x < YYY_MAX_SIZE".

Fix the size checks to be "x <= YYY_MAX_SIZE" instead.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-05-05 08:48:50 -04:00
Stefan Roese
c2ff69a444 watchdog: at91sam9_wdt: Remove now superfluous wdt start and reset
With the new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).

The watchdog servicing is enabled via CONFIG_WATCHDOG.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-26 09:16:32 +02:00