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6 commits

Author SHA1 Message Date
Benoît Thébaudeau
ccfa398547 arm1136: Fix enable_caches()
enable_caches() did not enable icache if CONFIG_SYS_ICACHE_OFF was not defined
but CONFIG_SYS_DCACHE_OFF was.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2012-11-10 12:28:22 +01:00
Benoît Thébaudeau
f8f09dd404 ARM1136: Fix cache range checks
bad_cache_range actually returned true if the range was OK, but it was used
according to its name, which resulted in all valid dcache range invalidate/flush
operations being dropped. Hence, most DMA transfers resulted in garbage data.

This patch renames this function according to what it does, and it fixes the
interpretation of its return value by other functions. The chosen naming is the
same as for ARM926EJ-S in order to be consistent.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-21 23:24:25 +02:00
Stefano Babic
fbf4a074e0 ARM1136: MX35: Make asm routines volatile in cache ops
As well as pushed for ARM926EJS, we certainly don't want
the compiler to reorganise the code for dcache flushing
Fix checkpatch warnings as well.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marex@denx.de>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
2012-04-16 14:53:59 +02:00
Anatolij Gustschin
219872c8fe ARM1136: add cache flush and invalidate operations
Since commit 5c1ad3e6f8
(net: fec_mxc: allow use with cache enabled) the FEC_MXC
driver uses flush_dcache_range() and invalidate_dcache_range()
functions. This driver is also configured for ARM1136 based
'flea3' and 'mx35pdk' boards which currently do not build
as there are no ARM1136 specific flush_dcache_range() and
invalidate_dcache_range() functions. Add various ARM1136
cache functions to fix building for 'flea3' and 'mx35pdk'.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-04-16 14:53:58 +02:00
George G. Davis
409a07c9d7 ARM1136: Fix cache_flush() error and correct cpu_init_crit() comments
The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0"
instruction which means "Invalidate Both Caches" when in fact the intent
is to clean and invalidate all caches.  So add an "mcr p15, 0, %0, c7,
c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate
Both Caches" instruction to insure that memory is consistent with any
dirty cache lines.

Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so
that they correctly describe the actual ARM1136 CP15 C7 Cache Operations
used.

Signed-off-by: George G. Davis <gdavis@mvista.com>
2010-06-01 06:44:09 -05:00
Peter Tyser
84ad688473 arm: Move cpu/$CPU to arch/arm/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:24 +02:00
Renamed from cpu/arm1136/cpu.c (Browse further)