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4 commits

Author SHA1 Message Date
Hongtao Jia
308bc61db7 powerpc/sgmii: To support PHY link state auto detect in SGMII mode
PHYs on SGMII riser card are used in SGMII mode with different external
IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type
under ethernet node should be updated. Otherwise the PHY interrupt can not
be handled therefor PHY link state change can not be auto detected.

For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed
but it's still be kept to guarantee the sgmii mode could work with old
device tree.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 18:32:15 -05:00
Andy Fleming
48c2b7bb43 fsl: Remove unnecessary debug printfs
These were left in accidentally, and are not really useful unless the
code is as broken as it was when it was being developed.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-03-09 17:46:10 -05:00
Andy Fleming
feede8b070 Fixup SGMII PHY ids in the device tree
The device tree's PHY addresses need to be fixed up if we're using the
SGMII Riser Card.

The 8572, 8536, and 8544 DS boards were modified to call this function.

Code idea taken from Liu Yu <yu.liu@freescale.com>

Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16 18:05:54 -06:00
Andy Fleming
652f7c2eef Add support for Freescale SGMII Riser Card
The 8544DS and 8572DS systems have an optional SGMII riser card which
exposes new ethernet ports which are connected to the eTSECs via an
SGMII interface.  The SGMII PHYs for this board are offset from the standard
PHY addresses, so this code modifies the passed in tsec_info structure to
use the SGMII PHYs on the card, instead.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00