Commit graph

1641 commits

Author SHA1 Message Date
Tom Rini
fc41ba1e2b OMAP3: Suffix all Micron memory timing parts with their speed
Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
1be1433b83 OMAP3: Add optimal SDRC autorefresh control values
This adds the optimal SDRC autorefresh control register values for
100Mhz, 133MHz, 165MHz and 200MHz clocks.  We switch to using this
to provide the default 165MHz value.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
14ca3dee80 omap3: mem: Add MCFG helper macro
This adds an MCFG macro to calculate the correct value, similar to
the ACTIMA/ACTIMB macros and adds a comment that all of the potential
values here are documented in the TRM.  Then we convert the Micron
value to use this macro.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
50e7ff0369 OMAP3: Remove get_mem_type prototype
This function doesn't exist for omap3

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
3bd8437dcc OMAP3: Change mem_ok to clear again after reading back
It's possible to need to call this function on the same banks multiple
times so we want to be sure that 'pos A' is cleared out again at the
end.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
2a04e85870 OMAP3: Add a helper function to set timings in SDRC
Since we go through the sequence to setup the SDRC timings more than
once, break this logic out into its own function and have that function
call mem_ok() to make sure the memory is usable.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
5f862b7179 OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
We update the comment in make_cs1_contiguous() to be a little bit
more clear (it's been copy/pasted from other silicons) and then
explain in dram_init() why we need to always try this.

Note that in the previous behavior we were always calling this on
boards that never had cs1 populated anyhow so making sure we do
this always is fine and will correct things like omap3evm detecting
an invalid amount of memory (384MB).

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:37 +01:00
Tom Rini
b7eb9e7895 omap3: mem: Comment enable_gpmc_cs_config more
Expand the "enable the config" comment to explain what the bit shifts
are and define out two of the magic numbers.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:37 +01:00
Christian Riesch
5cb939fb04 arm: printf() is not available in some SPL configurations
This patch avoids build breakage for SPLs that do not support printf.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-12-06 23:59:37 +01:00
Heiko Schocher
5b51e7f3ca arm, davinci: move misc function in arch tree
move the board/davinci/common/misc.c file to
arch/arm/cpu/arm926ejs/davinci/misc.c, so all
davinci boards can use this functions.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Christian Riesch <christian.riesch@omicron.at>
2011-12-06 23:59:37 +01:00
Heiko Schocher
7f34b1163a arm, davinci, da850: add uart1 tx rx pinmux config
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Christian Riesch <christian.riesch@omicron.at>
2011-12-06 23:59:37 +01:00
Heiko Schocher
b5ce18a235 arm, davinci: move davinci_rtc struct to hardware.h
move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h
and add RTC_KICK0R_WE, RTC_KICK1R_WE defines,
so they are global useable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2011-12-06 23:59:37 +01:00
Christian Riesch
65204715bd arm, davinci: Remove duplication of pinmux configuration code
This patch replaces the pinmux configuration code in
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from
arch/arm/cpu/arm926ejs/davinci/pinmux.c.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2011-12-06 23:59:37 +01:00
Christian Riesch
516fb1c4c0 arm, da850: Add pinmux configurations to the arch tree
Up to now nearly every davinci board has separate code for the
definition of pinmux configurations. This patch adds pinmux
configurations for the DA850 SoCs to the arch tree which may later
be used for all DA850 based boards.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
2011-12-06 23:59:36 +01:00
Christian Riesch
964930bcfd arm, davinci: Move pinmux functions from board to arch tree
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Syed Mohammed Khasim <sm.khasim@gmail.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Nick Thompson <nick.thompson@ge.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Nick Thompson <nick.thompson@ge.com>
2011-12-06 23:59:36 +01:00
Heiko Schocher
ca4b55800e arm, arm926ejs: always do cpu critical inits
always do the cpu critical inits in cpu_init_crit,
and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT
is not defined.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
2011-12-06 23:59:36 +01:00
Ilya Yanok
ad2a7909a1 AM3517: move AM3517 specific mux defines to generic header
AM3517 specific CONTROL_PADCONF_* defines moved from board-specific
files to <asm/arch-omap3/mux.h>

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:36 +01:00
Ilya Yanok
b9e65a797b AM35xx: add EMAC support
AM35xx has DaVinci-compatible EMAC.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:36 +01:00
Ilya Yanok
2f3427ccb9 arm926ejs: add noop implementation for dcache ops
Added noop implementation for dcache operations that will buzz
about missing real implementation and disable the dcache.
This fixes compilation of DaVinci EMAC driver on arm926ejs.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:35 +01:00
Ilya Yanok
7c587d320d davinci_emac: move arch-independent defines to separate header
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs
also. This patch moves common defines from arch-davinci/emac_defs.h to
drivers/net/davinci_emac.h

DaVinci specific PHY drivers hacked to include the new header. We might
want to switch to phylib in future.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2011-12-06 23:59:35 +01:00
Aneesh V
23e9f0723e omap4: fix IO setting
The value from TRIM is not working for some 4430 silicons.
So, override with hw team recommended value. However, for
4460 TRIM value shall be used as long as the part is trimmed

This fixes boot problem on some OMAP4430 ES2.0 Panda boards
out there.

Cc: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
9404758e9b omap4460: add ES1.1 identification
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
4324c118a0 omap4: emif: fix error in driver
There was a typo in the EMIF driver. It went un-noticed
because it affected only when automatic detection is enabled
and even then half the memory was configured and identified
properly.

Reported-by: Rockefeller <rockefeller.lin@innocomm.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
473673a5c8 omap: remove I2C from SPL
Due to some recent changes I2C is no longer required in SPL.
Remove the i2c_init() call to save some space

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
cd5847ac3a omap4460: fix TPS initialization
TPS power IC is controlled using a GPIO (gpio_wk7).
This GPIO should be maintained at logic 1 always. As
such an internal pull-up on this pin will do the job,
driving the GPIO outuput is not needed. This will avoid
the need of using GPIO library in SPL and also may
save some power.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
e4fce34e7a start.S: remove omap3 specific code from start.S
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:34 +01:00
Aneesh V
a8c686399f armv7: setup vector
The vector is not correctly setup in armv7 except for OMAP3.
Correcting this.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:33 +01:00
Aneesh V
87d3da7b01 armv7: include armv7/cpu.c in SPL build
This allows SPL to have default implementation of
save_boot_params(), useful for SoCs that do
not intend to override this default implementation

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:33 +01:00
Aneesh V
dc7100f408 armv7: disable L2 cache in cleanup_before_linux()
We were not disabling external caches before jumping
to kernel. We were flushing all caches including
external caches and disabling caches globally in
CP15 System Control register. Apparently this is not
enough.

The bootstrap loader in Linux kernel that does decompression
enables data-caches again, flush them after use and disable
them before jumping to kernel proper. However, it's not aware
of the external caches.

Since we have left external cache enabled, external cache will
get used once caches are enabled globally, but it's not flushed
because decompressor is not aware of external caches. When it
jumps to kernel with caches disabled globally, we have stale
data in the external cache and a coherency problem.

This was breaking the boot for OMAP4 with latest mainline
kernel. The solution is to disable external caches in
cleanup_before_linux(). With this fix kernel is booting again.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-12-06 23:59:33 +01:00
Christian Riesch
8f1da53508 arm, arm926ejs: Fix clear bss loop for zero length bss
This patch fixes the clear bss loop for bss sections that have
zero length, i.e., where __bss_start == __bss_end__.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2011-12-06 23:59:33 +01:00
Marek Vasut
f68d2a222f PXA: Rename pxa_dram_init to pxa2xx_dram_init
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:33 +01:00
Marek Vasut
77b04c578c PXA: Export cpu_is_ and pxa_dram_init functions
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Marek Vasut
d1bb9443f0 PXA: Replace timer driver
This new timer driver shall conform to new Timer API.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Marek Vasut
e8de0fa896 PXA: Add cpuinfo display for PXA2xx
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Marek Vasut
d10237d275 PXA: Separate PXA2xx CPU init
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Marek Vasut
abc20aba18 PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-12-06 23:59:32 +01:00
Marek Vasut
7f4cfcf40d PXA: Re-add the Dcache locking as RAM for pxa250
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-12-06 23:59:31 +01:00
Marek Vasut
20f7b1b745 PXA: Rework start.S to be closer to other ARMs
The start.S on PXA was very obscure. This reworks it back to be close to arm1136
start.S and others.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

V2: Don't compile in relocation support if building SPL
2011-12-06 23:59:31 +01:00
Wolfgang Denk
d194837fc3 Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
  Makefile: add tools/mkenvimage to target 'clean'
  mv_common.c: get rid of 'defined but not used' warning
  m68k: fix ambiguous bit testing
  sparc: fix unknown escape sequence warnings
  sparc: fix unused variable warnings
  sf: fix erase debug output
2011-12-05 23:33:48 +01:00
Mike Frysinger
65f0d12152 m68k: fix ambiguous bit testing
Building for some m68k boards results in the warning:

cpu_init.c: In function 'cpu_init_f':
cpu_init.c:287: warning: suggest parentheses around
	operand of '!' or change '&' to '&&' or '!' to '~'

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-05 21:55:25 +01:00
Mike Frysinger
8344a6d50b sparc: fix unused variable warnings
Fix the build warnings:
board.c: In function 'board_init_f':
board.c:179:8: warning: unused variable 'e'
board.c:178:6: warning: unused variable 'i'
board.c:173:13: warning: unused variable 'cmdtp'
bootm.c: In function 'do_bootm_linux':
bootm.c:101:28: warning: unused variable 'kernend'
bootm.c:101:15: warning: unused variable 'initrd_addr'
bootm.c💯26: warning: unused variable 'checksum'
bootm.c💯21: warning: unused variable 'len'
bootm.c💯15: warning: unused variable 'data'

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-05 21:55:24 +01:00
Nobuhiro Iwamatsu
bead86a836 sh: Add support Renesas SH7724
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-12-02 13:46:21 +09:00
Mike Frysinger
172106433b sh: avoid multiple definition errors with cache funcs
Recent builds for SH4 boards fail with a lot of errors like:
	cmd_mem.o: In function 'dcache_invalid_range':
	include/asm/cache.h:25: multiple definition of 'dcache_invalid_range'
	include/asm/cache.h:25: first defined here

This is due to the funcs being defined in the header, but not static
or inline or extern.  So move them to the sh4-specific cache.c file.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-12-02 13:46:21 +09:00
Phil Edworthy
cb4046c592 sh: Add ashrsi3 libgcc function
The ashrsi3 function is used by some commands that aren't in SH2A
default configs (e.g. JFFS2).

The ashrsi3.S file has been copied from Linux.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-12-02 13:46:20 +09:00
Mike Frysinger
4cde1740d2 sh: only add -mno-fdpic if the compiler supports it
Not all SuperH toolchains support -mno-fdpic.  Chances are good that if
the flag doesn't work, it isn't defaulting to the FDPIC ABI, so the flag
isn't needed.  So only add it if it is actually supported.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-12-02 13:46:20 +09:00
Wolfgang Denk
ad37ef1a85 arch/powerpc/cpu/mpc86xx/cpu.c: Fix GCC 4.6 build warning
Fix:
cpu.c: In function 'checkcpu':
cpu.c:51:7: warning: variable 'ver' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-02 00:16:46 +01:00
Wolfgang Denk
d51e6d6de2 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  mpc85xx: support for Freescale COM Express P2020
  arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
  mpc85xx: support board-specific reset function
  powerpc/85xx: verify the localbus device tree address before booting the OS
  mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification
  powerpc/p3060qds: Add board related support for P3060QDS platform
  powerpc/85xx: clean up and document the QE/FMAN microcode macros
  powerpc/85xx: always implement the work-around for Erratum SATA_A001
  powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h
  powerpc/85xx: Add workaround for erratum A-003474
  powerpc/85xx: fixup flexcan device tree clock-frequency
  powerpc/85xx: Add workaround for erratum CPU-A003999
2011-12-01 23:58:11 +01:00
Ira W. Snyder
9839709ea3 mpc85xx: support for Freescale COM Express P2020
This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.

Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.

This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-29 09:07:51 -06:00
Kumar Gala
411e150375 arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warning
Fix:

interactive.c: In function 'fsl_ddr_interactive':
interactive.c:1357:15: warning: variable 'len' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-29 08:48:06 -06:00
Ira W. Snyder
c18de0d7ae mpc85xx: support board-specific reset function
This is useful for boards which cannot be reset in the usual way for the
85xx CPU. An example is a board which can only be reset by a hardware
watchdog.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-29 08:48:06 -06:00