Commit graph

44 commits

Author SHA1 Message Date
eric.gao@rock-chips.com
0c6d52bc4b rockchip: video: mipi: Modify format type for debug message
Modify format type for debug message.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
2017-07-11 12:13:48 +02:00
eric.gao@rock-chips.com
0c9eceb7af rockchip: video: mipi: Modify variable type for arm32 compatibility
Some address relevant varibable is defined originally as u64. To
compatible with arm32, this patch change them to uintptr_t type.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-07-11 12:13:47 +02:00
Tom Rini
8cb3ce64f9 Merge git://git.denx.de/u-boot-dm 2017-06-10 18:01:22 -04:00
Simon Glass
6b5a09aa38 rockchip: video: Take the vop device out of standby
On reset the standby bit is clear, but if U-Boot is chain-loaded from
another boot loader it may be set. Clear it before starting up video so
that it works correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09 13:45:33 -06:00
Simon Glass
f418676e9a rockchip: video: Add remove() methods
Add remove() methods for EDP and VOP so that U-Boot can shut down the
video on exit. This avoids leaving DMA running while booting Linux which
can cause problems if Linux uses the frame buffer for something else.

It also makes it clear what is needed to shut down video.

While we are here, make rkvop_enable() static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Squashed in 'rockchip: video: fix taking the VOP device out of standby':
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-09 13:45:28 -06:00
Philipp Tomsich
76a5e1b715 rockchip: video: document externally visible functions for rk_vop
Documents the externally visible functions shared between the VOP
drivers for the RK3288 and RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:57:25 +02:00
Philipp Tomsich
56c7ba3462 rockchip: video: document externally visible functions for rk_hdmi
Documents the externally visible functions shared between the HDMI
drivers for the RK3288 and RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-09 15:53:48 +02:00
Philipp Tomsich
64199d4ead rockchip: video: rk_vop: add grf field
The last set of rebases had dropped the 'grf' field from the common
rk_vop.  Add this back to un-break the build (and driver).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
ca562b630e rockchip: video: rk3399: add HDMI TX support on the RK3399
This commit enables the RK3399 HDMI TX, which is very similar to the
one found on the RK3288.  As requested by Simon, this splits the HDMI
driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and
a common portion (rk_hdmi.c).

Note that the I2C communication for reading the EDID works well with
the default settings, but does not with the alternate settings used on
the RK3288... this configuration aspect is reflected by the driverdata
for the RK3399 driver.

Having some sort of DTS-based configuration for the regulator
dependencies would be nice for the future, but for now we simply use
lists of regulator names (also via driverdata) that we probe.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
147fd3ac5a rockchip: video: split RK3288-specific part off from rk_hdmi
To prepare for the addition of RK3399 HDMI support, the HDMI driver is
refactored and broken into a chip-specific and a generic part.  This
change adds the internal interfaces, makes common/reusable functions
externally visible and splits the RK3288 driver into a separate file.

For the probing of regulators, we reuse the infrastructure created
during the VOP refactoring... i.e. we simply call into the helper
function defined for the VOP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
f210e5574f rockchip: video: add mpixelclock settings from Linux driver
The Linux driver now supports higher mpixelclock settings.
Add these to rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:50 -06:00
Philipp Tomsich
cc75afc5d7 rockchip: video: rk3399: enable HDMI output (from the rk_vop) for the RK3399
This commit adds a driver for the RK3399 VOPs capable and all the
necessary plumbing to feed the HDMI encoder. For the VOP-big, this
correctly tracks the ability to feed 10bit RGB data to the encoder.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
d46d40474a rockchip: video: refactor rk_vop and split RK3288-specific code off
To prepare for adding the RK3399 VOP driver (which shares most of its
registers and config logic with the RK3228 VOP), this change refactors
the driver and splits the RK3288-specific driver off.

The changes in detail are:
- introduces a data-structure for chip-specific drivers to register
  features/callbacks with the common driver: at this time, this is
  limited to a callback for setting the pin polarities (between the
  VOP and the encoder modules) and a flag to signal 10bit RGB
  capability
- refactors the probing of regulators into a helper function that
  can take a list of regulator names to probe and autoset
- moves the priv data-structure into a (common) header file to be
  used by the chip-specific drivers to provide base addresses to
  the common driver
- uses a callback into the chip-specific driver to set pin polarities
  (replacing the direct register accesses previously used)
- splits enabling the output (towards an encoder) into a separate
  help function withint the common driver

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
89b2b6186d rockchip: video: Kconfig: set MAX_XRES and MAX_YRES via Kconfig
This introduces two new Kconfig options that configure the maximum
allowable framebuffer size (i.e. the memory reservation/allocation for
the framebuffer):
 - VIDEO_ROCKCHIP_MAX_XRES
 - VIDEO_ROCKCHIP_MAX_YRES
The resulting memory allocation will cover 4 byte per pixel for these
resolutions.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
d4bee08419 rockchip: video: Kconfig: reformat help for VIDEO_ROCKCHIP
For consistency sake (and as we are about to add new options to this
file), reformat the help for VIDEO_ROCKCHIP.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:49 -06:00
Philipp Tomsich
1208523935 rockchip: video: rk_hdmi: fix implicit definition warnings
When enabling CONFIG_DISPLAY_ROCKCHIP_HDMI, compile-time warning for
the following implicitly defined functions are raised due to a missing
include directive:

  drivers/video/rockchip/rk_hdmi.c: In function 'rk_hdmi_probe':
  drivers/video/rockchip/rk_hdmi.c:150:2: warning: implicit declaration of function 'rk_setreg' [-Wimplicit-function-declaration]
    rk_setreg(&priv->grf->soc_con6, 1 << 15);
    ^~~~~~~~~
  drivers/video/rockchip/rk_hdmi.c:153:2: warning: implicit declaration of function 'rk_clrsetreg' [-Wimplicit-function-declaration]
    rk_clrsetreg(&priv->grf->soc_con6, 1 << 4,
    ^~~~~~~~~~~~

This change fixes this by including <asm/hardware.h> in rk_hdmi.c.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 21:30:47 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Philipp Tomsich
8517f64fe6 rockchip: video: introduce VIDEO_DW_HDMI and select for Rockchip HDMI
Instead of having drivers/video/rockchip/Kconfig point outside of its
hierarchy for dw_hdmi.o, we should use a configuration-option to
include the Designware HDMI support.

This change introduces a new config option (not to be selected via
menuconfig, but to be selected from a dependent video driver's
configuration option) that enables dw_hdmi.o and selects it whenever
the HDMI support for Rockchip SoCs is selected.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-15 20:42:56 +02:00
Eric Gao
c34bd8b820 rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve frame buffer space befor relocation.
our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame
buffer size should be at least 1920*1200*32/8.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
8aed0d7751 rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
9f819931e0 rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
Eric Gao
e07e5bde7c rockchip: video: vop: Fix rk_display_init() return error
It's caused by the difference of clk_set_rate function implement between
rk3288 andd rk3399.

clk_set_rate() of rk3288 return 0 in normal condition.
clk_set_rate() of rk3399 return input parameter in normal condition.

So check clk_set_rate's return value by IS_ERR_VALUE.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
2017-05-10 13:37:22 -06:00
Eric Gao
1c3984041c rockchip: video: Add mipi driver support for rockchip soc
Add basic driver for mipi display on rockchip soc platform.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:22 -06:00
eric.gao@rock-chips.com
da10dd1a72 rockchip: video: Makefile: Modify Makefile for rockchip video driver
Modify Makefile for rockchip video driver according to Kconfig, so that
source code will not be compiled if not needed.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
eric.gao@rock-chips.com
b98f0a3d97 rockchip: video: Kconfig: Add Kconfig for rockchip video driver
1. add Kconfig for rockchip video driver, so that video port can be
selected as needed.
2. move VIDEO_ROCKCHIP option to new Kconfig for concision.

Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop indenting in Kconfig:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00
Jernej Skrabec
cc232a9d07 rockchip: video: Split out HDMI controller code
Designware HDMI controller and phy are used in other SoCs as well. Split
out platform independent code.

DW HDMI has 8 bit registers but they can be represented as 32 bit
registers as well. Add support to select access mode.

EDID reading code use reading by blocks which is not supported by other
SoCs in general. Make it more general using byte by byte approach, which
is also used in Linux driver.

Finally, not all DW HDMI controllers are accompanied with DW HDMI phy.
Support custom phys by making controller code independent from phy code.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Tested-by: Nickey Yang <nickey.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:01:57 -06:00
Jernej Skrabec
520c174b35 rockchip: video: Remove CSC initialization (HDMI)
Despite the comment in the code, CSC unit is never used. According to
the only public description of DW HDMI controller (i.MX6 manual), CSC
unit is bypassed in MC_FLOWCTRL register and then actually powered
down in MC_CLKDIS register.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:47 -06:00
Jernej Skrabec
a0a2774aeb rockchip: video: Fix HDMI audio clocks
Function hdmi_lookup_n_cts() is feed with clock in Hz, which gets
compared with clocks in kHz. Fix that by converting all clocks to Hz.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-16 16:03:47 -06:00
Nickey Yang Nickey Yang
94412745cd rockchip: video: fix 83500000 clock mistake in rockchip HDMI
There is one "0" too many in 83500000 mpixelclock in rockchip_mpll_cfg[].
fix it.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-02-27 16:10:45 +01:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Nickey Yang Nickey Yang
0fc41e551e rockchip: video: fix mpixelclock in rockchip HDMI
Correct mpixelclock errors in rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-01-11 20:23:50 -07:00
Simon Glass
095e6c1f2d rockchip: video: Avoid using u8 in the HDMI driver
It makes not sense using u8 to hold a value on a 32-bit or 64-bit machine.
It can only bloat the code by forcing the compiler to mask the value.
Change it to uint.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
987a404aa1 rockchip: video: Check for device in use
Check whether a display device is in use before using it. Add a comment as
to why two displays cannot currently be used at the same time.

This allows us to remove the device-tree change that disables vopb on
jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
9ed6826060 rockchip: video: Correct VOP clock selection
This code incorrectly uses the oscillator. It should use the clock
selected in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 135aa95 (clk: convert API to match reset/mailbox style)
2016-11-25 17:59:30 -07:00
Simon Glass
e4ab3d712a rockchip: video: Correct HDMI data source selection
This code currently always selects the second source. It only worked
because both sources are set up.

With the change to only init video devices that are present in the stdout
environment variable, this fails. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Simon Glass
c3aad6f65b rockchip: Use rockchip_get_clk() to obtain the SoC clock
The current code picks the first available clock. In U-Boot proper this is
the oscillator device, not the SoC clock device. As a result the HDMI display
does not work.

Fix this by calling rockchip_get_clk() instead.

Fixes: 135aa950 (clk: convert API to match reset/mailbox style)
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2016-07-25 20:46:45 -06:00
Sjoerd Simons
70c440e5bd rockchip: video: Lower hpd wait time
Waiting 30 seconds for the hpd to go high seems a bit much, especially
on headless boots. Lowering the timeout to 300ms.

Sending as RFC because frankly i don't know what a sensible timeout is
here, but 30 seconds is clearly not it :)

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped RFC tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-05 10:38:56 -06:00
Stephen Warren
135aa95002 clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
  provider now implements a single set of clocks. This provides a simpler
  conceptual interface to clients, and better aligns with device tree
  clock bindings.
* Clocks are now identified with a single "struct clk", rather than
  requiring clients to store the clock provider device and clock identity
  values separately. For simple clock consumers, this isolates clients
  from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
  clk-uclass.h contains the provider API. This aligns with the recently
  added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
  can customize these operations if needed. This also aligns with the
  recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
  clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.

Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.

test/py passes for sandbox (which invokes the dm clk test amongst
others).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-06-19 17:05:55 -06:00
Simon Glass
b55e04a021 rockchip: video: Flush the cache when the display is updated
Enable this option to correct display artifacts when a write-back cache is
in use.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-05-27 10:23:08 -06:00
Jacob Chen
8530783594 rockchip: video: Add LVDS support in vop driver
LVDS have a different display out mode, add code to get right flag.

The vop_ip decide display device and the remote_vop_id decide which
vop was being used. So we should use the remote_vop_id to set DCLK_VOP.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-03-14 22:24:10 +01:00
Jacob Chen
35ac89dd8f rockchip: video: Add a display driver for rockchip LVDS
Some Rockchip SoCs support LVDS output. Add a display driver for this so
that these displays can be used on supported boards.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-03-14 22:06:33 +01:00
Simon Glass
7b7ad5c31c rockchip: video: Add a video-output driver
Some rockchip SoCs include video output (VOP). Add a driver to support this.
It can output via a display driver (UCLASS_DISPLAY) and currently HDMI and
eDP are supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
5852d539ea rockchip: video: Add a display driver for rockchip eDP
Some Rockchip SoCs support embedded DisplayPort output. Add a display driver
for this so that these displays can be used on supported boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00
Simon Glass
c253948341 rockchip: video: Add a display driver for rockchip HDMI
Some Rockchip SoCs support HDMI output. Add a display driver for this so
that these displays can be used on supported boards.

Unfortunately this driver is not fully functional. It cannot reliably read
EDID information over HDMI. This seems to be due to the clocks being
incorrect - the I2C bus speed appears to be up to 100x slower than the
clock settings indicate. The root cause may be in the clock logic.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-01-21 20:42:36 -07:00