Commit graph

58172 commits

Author SHA1 Message Date
Luka Kovacic
7945436f88 arm: mvebu: crs305-1g-4s: Enable CMD_BOOTZ and increase SYS_BOOTM_LEN
This change enables CMD_BOOTZ and increases SYS_BOOTM_LEN to
make it easier to work with kernel images.

Signed-off-by: Luka Kovacic <me@lukakovacic.xyz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
6165c89128 arm: mvebu: turris_omnia: fix rescue mode bootcmd bootargs setting
Rescue mode bootcmd currently only appends the "omniarescue" parameter
to the bootargs variable. We do not want the user to be able to change
rescue mode bootargs. Therefore change this so that bootcmd sets the
bootargs variable in an absolute way (adding console device information
and the omniarescue paramterer).

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
02aa5af922 arm: mvebu: turris_omnia: call pci_init from board init code
We always want to enumerate PCIe devices, because withouth this they
won't work in Linux.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
27e3d4846d arm: mvebu: turris_omnia: prefer SCSI booting before USB
If SCSI and USB boot options are both available, try to boot from SCSI
first.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
422237ee59 arm: mvebu: turris_omnia: remove unneeded macro from board config
This is not needed here since Omnia is using DM_PCI now.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
305a82217d arm: mvebu: turris_omnia: change environment address in SPI flash
The U-Boot partition is 1 MiB and environment is 64 KiB. It does not
make sense to have environment at 0xc0000 when it could be at 0xf0000
and we can have more space for U-Boot binary.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
b0045b1c11 arm: mvebu: turris_omnia: fix adapters MAC addresses
The board code reads MAC addresses from the ATSHA204A cryptochip.
For compatibility reasons the ethernet adapters on this SOC are not
enumerated in register address order. But when Omnia was first
manufactured this was done differently.

Change setting of MAC addresses to conform to the description on the
stickers sticked on actual Omnias.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Marek Behún
1b355e53fc arm: mvebu: turris_omnia: set default ethernet adapter
Set default value for the ethact variable to the WAN port.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
85fe44105a arm: mvebu: clearfog: document boot from SATA
Document the main U-Boot image offset when booting from SATA disk on the
Clearfog board.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
6403d385b6 arm: mvebu: clearfog: set U-Boot offset for SATA boot
See the offset of U-Boot in raw SATA disk to the same value as the MMC
offset. That is 0x140 sectors from the beginning of the SPL, which is
0x141 sectors from the beginning of the device (after the MBR sector).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
22c47f6bbe arm: mvebu: clearfog: enable SATA in SPL
Enable SATA peripherals in SPL to allow boot from SATA.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
22c654557f arm: mvebu: add support for boot from SATA
Add the required Kconfig and macro definitions to allow boot from SATA
on Armada 38x systems.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
f0aa125477 arm: mvebu: fix ahci mbus config in SPL
SPL does not initialize mbus_dram_info. Don't change the ahci mbus
settings of the ROM. This allows the ahci to work in SPL.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:02 +02:00
Baruch Siach
760ef309cb spl: sata: don't force FS_FAT support
Allow the code to build when FS_FAT is not enabled, and thus
spl_load_image_fat() is not provided.

A subsequent patch should add alternative raw access U-Boot main image
load method.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 07:01:18 +02:00
Baruch Siach
ab2d415e9b spl: sata: fix build with DM_SCSI
The init_sata() routine is only present when DM_SCSI is not enabled.
Don't call init_sata() when DM_SCSI is enabled. The code will fall back
to scsi_scan() in this case.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 07:01:18 +02:00
Baruch Siach
a4c61ffde3 spl: sata: add default partition and image name
Add sensible defaults for the FAT partition selection and the main
U-Boot image file name. This allows spl_sata to build when the board
headers does not select them explicitly.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 07:01:18 +02:00
Heinrich Schuchardt
7ea3357957 trace: trace buffer may exceed 2GiB
Correct the debug output for the trace buffer size to accommodate trace
buffers exceeding 2GiB.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Heinrich Schuchardt
2b7a3882e0 trace: do not limit trace buffer to 2GiB
There is no good reason to limit the trace buffer to 2GiB on a 64bit
system. Adjust the types of the relevant parameters.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Alex Marginean
b8e1f8270c drivers: pci: add API to issue FLR on a PCI function if supported
Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function,
if FLR is supported.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
21ebbafde8 test: dm: Add a test for PCI Enhanced Allocation
This test is built on top of the existing swap_case driver.  It adds EA
capability structure support to swap_case and uses that to map BARs.
BAR1 works as it used to, swapping upper/lower case.  BARs 2,4 map to a
couple of magic values.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
0b143d8ab2 drivers: pci: add map_bar support for Enhanced Allocation
Makes dm_pci_map_bar API available for integrated PCI devices that
support Enhanced Allocation instead of the original PCI BAR mechanism.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Alex Marginean
2204bc1bd3 pci: fixed dm_pci_map_bar comment
The comment now indicates that the input argument bar is a register offset,
not a BAR index.
It also mentions which BARs are supported for type 0/1 and that the
function can return 0 on error.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Heinrich Schuchardt
da0fb5fdd4 trace: make call depth limit customizable
Up to now we had hard coded values for the call depth up to which trace
records are created: 200 for early tracing, 15 thereafter. UEFI
applications reach a call depth of 80 or above.

Provide customizing settings for the call trace depth limit and the early
call trace depth limit. Use the old values as defaults.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Heinrich Schuchardt
a2fa38da20 trace: conserve gd register
An UEFI application may change the value of the register that gd lives in.
But some of our functions like get_ticks() access this register. So we
have to set the gd register to the U-Boot value when entering a trace
point and set it back to the application value when exiting the trace
point.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Heinrich Schuchardt
7ef8e9b09a trace: undefined reference to `trace_early_init'
Compiling with TRACE but without TRACE_EARLY results in an error
aarch64-linux-gnu-ld.bfd:
common/built-in.o:(.rodata.init_sequence_f+0x10):
undefined reference to `trace_early_init'

trace_early_init() should not be called if CONFIG_TRACE_EARLY is not
defined.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Patrick Delaunay
54e1223aa4 dm: doc: add documentation for pre-reloc properties in SPL and TPL
Add documentation for the pre-reloc property in SPL and TPL device-tree:
- u-boot,dm-pre-proper
- u-boot,dm-pre-reloc
- u-boot,dm-spl
- u-boot,dm-tpl

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Patrick Delaunay
6998974926 fdt: Allow indicating a node is for U-Boot proper only
This add missing parts for previous commit 06f94461a9
("fdt: Allow indicating a node is for U-Boot proper only")

At present it is not possible to specify that a node should be used before
relocation (in U-Boot proper) without it also ending up in SPL and TPL
device trees. Add a new "u-boot,dm-pre-proper" boolean property for this.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Patrick Delaunay
099ed45c6c test: check u-boot properties in SPL device tree
Add a test to check the management of the U-boot relocation properties
for device tree SPL generation (fdtgrep result) and platdata:
- 'dm-pre-proper' and 'dm-tpl' not included in SPL
- 'dm-pre-reloc' and 'dm-spl' included in SPL

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Thierry Reding
848e94d0ba fdtdec: test: Fix memory leak
Free the memory allocated to store the test FDT upon test completion to
avoid leaking the memory. We don't bother cleaning up on test failure
since the code is broken in that case and should be fixed, in which case
the leak would also go away.

Reported-by: Tom Rini <tom.rini@gmail.com>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Vabhav Sharma
1edc5688df drivers: serial: lpuart: Enable Little Endian Support
By default LPUART driver with compatible string "fsl,ls1021a-lpuart"
support big-endian mode.On NXP SoC like LS1028A LPUART IP is
little-endian,Added support to Fetch LPUART IP Endianness from lpuart
device-tree node.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
ca2abb75a0 spi: Avoid using malloc() in a critical function
In general we should avoid calling malloc() and free() repeatedly in
U-Boot lest we turn it into tianocore. In SPL this can make SPI flash
unusable since free() is often a nop and allocation space is limited.

In any case, these seems no need for malloc() since the number of bytes
is very small, perhaps less than 8.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI
	memory controllers)
2019-07-10 16:52:58 -06:00
Simon Glass
731ba3c0be blk: Allow control of the block cache in TPL
Generally block devices are not enabled in TPL, but in case they are,
add a Kconfig option for the block cache. This allows the setting (default
off) to be found with CONFIG_IS_ENABLED().

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
59d0452df3 bootstage: Add support for TPL record count
If bootstage is enabled in TPL it lacks a record count and so does not
build. Fix this by adding a new Kconfig option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
44c6a0ed6e x86: Add a forward struct declaration in coreboot_tables.h
This struct is not defined in this header file. Add a forward declaration
so that it can be included in any context.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-10 16:52:58 -06:00
Simon Glass
80b7cb8c32 sandbox: Add documentation on how to run valgrind
U-Boot sandbox can run with valgrind to check memory allocations. Add
documentation on how to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
24c2776ba9 sandbox: Correct spi flash operation
Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix
this by using the expected compatible string in the flash node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
2019-07-10 16:52:58 -06:00
Simon Glass
e676f4397c sandbox: Add a memory {} node
Add a memory node which indicates the size of sandbox memory.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
e8a7b3051b sandbox: Allo sdl-config to be overridden
When cross-compiling, sometimes sdl-config must come from a different path
from the default. Add a way to override it, by adding SDL_CONFIG to the
environment before building U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
912dcb1b17 sandbox: Add a comment to board_init_f()
This function is used for both SPL and TPL. Add a comment to that effect.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
3f2f5cf62a sandbox: spl: Lower priority of standard loader
We normally want to load U-Boot from SPL, but if a board wants to do
something else, it is currently not possible since the standard loader
has the top priority. Lower it to allow other SPL_LOAD_IMAGE_METHOD()
declarations to override it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
f2980ece06 sandbox: Quit when hang() is called
It doesn't make a lot of sense to hang on sandbox when hang() is called,
since the only way out is Ctrl-C. In fact, Ctrl-C does not work if the
terminal is in raw mode, which it will be if the command-line has not been
reached yet. In that case, Ctrl-Z / kill -9 must be used, which is not
very friendly.

Avoid all of this by quiting when hang() is called.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
9072326a6a sandbox: Exit when SYSRESET_POWER_OFF is requested
At present this returns but it seems better to just exit sandbox
immediately.

Signed-off-by: Simon Glass <sjg@chromium.org>

reset
2019-07-10 16:52:58 -06:00
Simon Glass
87dac6b074 sandbox: Add an alias for SPI
At present 'sf probe' does not work since it cannot find SPI bus 0. Add
an alias to correct this, now that we no-longer have the --spi_sf option.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
dc8c91abb7 sandbox: Create a common sandbox DT
At present sandbox and sandbox64 have duplicated nodes. This is hard to
maintain since changes in one need to be manually added to the other.

Create a common file to solve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
e8726da226 sandbox: Sync up sandbox64.dts with main DT
Various nodes have been added and adjusted with sandbox. Move these
changes over to sandbox64.dts to keep these in sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
00ba3b1edc Add a simple script to remove boards
This script attempts to create a git commit which removes a single board.
It is quite fallible and everything it does needs checking. But it can
help speed up the process.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2019-07-10 16:52:58 -06:00
Simon Glass
9550f9acd6 patman: Update cover-coverage tests for Python 3
We need slightly different commands to run code coverage with Python 3.
Update the RunTestCoverage() function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
5385f5a018 binman: Update the README.entries file
A few minor changes have been made including one new entry. Update the
documentation with:

   $ binman -E >tools/binman/README.entries

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
55660d08a0 binman: Document parallel tests
Since binman can run tests in parallel, document this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00
Simon Glass
eb546ac181 binman: Read map files as text
These files are text files so should be read as such, so that
string-equality assertions work as expected.

With this binman tests work correctly on Python 2 and Python 3:

PYTHONPATH=/tmp/b/sandbox_spl/scripts/dtc/pylibfdt \
	python ./tools/binman/binman -t

Change first line of binman.py to end "python3":

PYTHONPATH=~/cosarm/dtc/pylibfdt:tools/patman \
	python3 ./tools/binman/binman -t

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-10 16:52:58 -06:00