Commit graph

46334 commits

Author SHA1 Message Date
Simon Glass
58b2247542 mkimage: Drop blank line before main()
This is not needed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:27 -04:00
Simon Glass
63ef31b9ef mkimage: Drop premature setting of params.fit_image_type
There is no need to set params.fit_image_type while parsing the arguments.
It is set up later anyway.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:27 -04:00
Simon Glass
e324a92531 mkimage: Require a data file when auto-fit is used
When auto-fit is used, it is not valid to create a FIT without an image
file. Add a check for this to avoid a very confusing error message later
("Can't open (null): Bad address").

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:27 -04:00
Simon Glass
3c23c0feac mkimage: Explain the auto-fit imagefile special case
There is a special case in the code when auto-fit is used. Add a comment to
make it easier to understand why this is needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-07-14 18:22:26 -04:00
Simon Glass
20deaddd46 mkimage: Honour the default image type with auto-fit
The default image type is supposed to be IH_TYPE_KERNEL, as set in the
'params' variable. Honour this with auto-fit also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:26 -04:00
Masahiro Yamada
9a387128e3 linux/io.h: add generic ioremap()/iounmap() defines
For most of architectures in U-Boot, virtual address is straight
mapped to physical address.  So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.

All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.

I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-07-14 18:22:26 -04:00
Masahiro Yamada
c74b8fcdd7 arm, nds32, sh: remove useless ioremap()/iounmap() defines
These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-14 18:22:25 -04:00
Masahiro Yamada
95ebc253e6 types.h: move and redefine resource_size_t
Currently, this is only defined in arch/arm/include/asm/types.h,
so move it to include/linux/types.h to make it available for all
architectures.

I defined it with phys_addr_t as Linux does.  I needed to surround
the define with #ifdef __KERNEL__ ... #endif to avoid build errors
in tools building.  (Host tools should not include <linux/types.h>
in the first place, but this is already messy in U-Boot...)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-14 18:22:24 -04:00
Andreas Dannenberg
8662bea38e doc: Update info on using secure devices from TI
Adds information regarding SPL handling the loading and processing of
secured u-boot images as part of the second stage boot the SPL does.
Introduces the description of a new interface script in the TI SECDEV
Package which handles the creation and prep of secured binary images.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-14 18:22:23 -04:00
Madan Srinivas
e29878fc47 arm: am4x: add U-Boot FIT signing and SPL image post-processing
Modify the SPL build procedure for AM437x high-security (HS) device
variants to create a secure u-boot_HS.img FIT blob that contains U-Boot
and DTB artifacts signed (and optionally encrypted) with a TI-specific
process based on the CONFIG_TI_SECURE_DEVICE config option and the
externally-provided image signing tool.

Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.

Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:23 -04:00
Andreas Dannenberg
17c2987336 arm: omap5: add U-Boot FIT signing and SPL image post-processing
Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS)
device variants to create a secure u-boot_HS.img FIT blob that contains
U-Boot and DTB artifacts signed with a TI-specific process based on the
CONFIG_TI_SECURE_DEVICE config option and the externally-provided image
signing tool.

Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:22 -04:00
Daniel Allred
da74d1f341 spl: fit: add support for post-processing of images
The next stage boot loader image and the selected FDT can be post-
processed by board/platform/device-specific code, which can include
modifying the size and altering the starting source address before
copying these binary blobs to their final destination. This might be
desired to do things like strip headers or footers attached to the
images before they were packaged into the FIT, or to perform operations
such as decryption or authentication. Introduce new configuration
option CONFIG_SPL_FIT_IMAGE_POST_PROCESS to allow controlling this
feature. If enabled, a platform-specific post-process function must
be provided.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-14 18:22:21 -04:00
Andreas Dannenberg
bf9ec864f4 arm: omap-common: Update to generate secure U-Boot FIT blob
Adds commands so that when a secure device is in use and the SPL is
built to load a FIT image (with combined U-Boot binary and various
DTBs), these components that get fed into the FIT are all processed to
be signed/encrypted/etc. as per the operations performed by the
secure-binary-image.sh script of the TI SECDEV package. Furthermore,
perform minor comments cleanup to make better use of the available
space.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-14 18:22:20 -04:00
Andreas Dannenberg
1bb0a21b46 arm: omap-common: secure ROM signature verify API
Adds an API that verifies a signature attached to an image (binary
blob). This API is basically a entry to a secure ROM service provided by
the device and accessed via an SMC call, using a particular calling
convention.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:19 -04:00
Andreas Dannenberg
d86f7afda4 arm: omap-common: add secure rom call API for secure devices
Adds a generic C-callable API for making secure ROM calls on OMAP and
OMAP-compatible devices. This API provides the important function of
flushing the ROM call arguments to memory from the cache, so that the
secure world will have a coherent view of those arguments. Then is
simply calls the omap_smc_sec routine.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:19 -04:00
Daniel Allred
51d0638650 arm: omap-common: add secure smc entry
Add an interface for calling secure ROM APIs across a range of OMAP and
OMAP compatible high-security (HS) device variants. While at it, also
perform minor cleanup/alignment without any change in functionality.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:18 -04:00
Daniel Allred
ec6f61003b arm: cache: add missing dummy functions for when dcache disabled
Adds missing flush_dcache_range and invalidate_dcache_range dummy
(empty) placeholder functions to the #else portion of the #ifndef
CONFIG_SYS_DCACHE_OFF, where full implementations of these functions
are defined.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-14 18:22:17 -04:00
Masahiro Yamada
6b6024eadb arm64: add better and more generic spin-table support
There are two enable methods supported by ARM64 Linux; psci and
spin-table.  The latter is simpler and helpful for quick SoC bring
up.  My main motivation for this patch is to improve the spin-table
support, which allows us to boot an ARMv8 system without the ARM
Trusted Firmware.

Currently, we have multi-entry code in arch/arm/cpu/armv8/start.S
and the spin-table is supported in a really ad-hoc way, and I see
some problems:

  - We must hard-code CPU_RELEASE_ADDR so that it matches the
    "cpu-release-addr" property in the DT that comes from the
    kernel tree.

  - The Documentation/arm64/booting.txt in Linux requires that
    the release address must be zero-initialized, but it is not
    cared by the common code in U-Boot.  We must do it in a board
    function.

  - There is no systematic way to protect the spin-table code from
    the kernel.  We are supposed to do it in a board specific manner,
    but it is difficult to predict where the spin-table code will be
    located after the relocation.  So, it also makes difficult to
    hard-code /memreserve/ in the DT of the kernel.

So, here is a patch to solve those problems; the DT is run-time
modified to reserve the spin-table code (+ cpu-release-addr).
Also, the "cpu-release-addr" property is set to an appropriate
address after the relocation, which means we no longer need the
hard-coded CPU_RELEASE_ADDR.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-14 18:22:16 -04:00
Tom Rini
3a592a1349 Revert "armv8: Enable CPUECTLR.SMPEN for coherency"
Upon further review this breaks most other platforms as we need to check
what core we're running on before touching it at all.

This reverts commit d73718f323.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-07-14 17:36:18 -04:00
Andrej Rosano
a02ab5eaff usbarmory: Add board_run_command() function
Define a default board_run_command() function. This function contains
the commands needed to boot the board when CLI is disabled (CONFIG_CMDLINE=n).

Signed-off-by: Andrej Rosano <andrej@inversepath.com>
2016-07-12 17:58:50 +02:00
Andrej Rosano
9a45ec3ea0 usbarmory: switch to using kernel zImage
Switch to using zImage instead of uImage.

Signed-off-by: Andrej Rosano <andrej@inversepath.com>
2016-07-12 17:58:50 +02:00
Peng Fan
1f17562796 imx6: clock: typo fix
Typo fix, "PPL2 -> PLL2"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-07-12 17:58:50 +02:00
Hannes Schmelzer
225126da99 arch-mx6: fix MX6_PAD_DECLARE macro to work with MX6 duallite
if we build for an i.mx6 (d)ual(l)ite CONFIC_MX6DL we shall use
MX6DL_PAD instead the common MX6_PAD.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2016-07-12 17:58:50 +02:00
Vanessa Maegima
ca103e0996 pico-imx6ul: Add USB Host support
Add USB host support.

Tested by connecting a USB pen drive:

=> usb start
starting USB...
USB0:   Port not available.
USB1:   USB EHCI 1.00
scanning bus 1 for devices... 2 USB Device(s) found
       scanning usb for storage devices... 1 Storage Device(s) found

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:50 +02:00
Diego Dorta
d0daec670f pico-imx6ul: Add NFS boot support
Add script for retrieving the kernel via TFTP and mounting the
rootfs via NFS.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:50 +02:00
Vanessa Maegima
dab1493459 pico-imx6ul: Add a README file
Add a README file to help users to install U-boot binary into the eMMC.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:49 +02:00
Vanessa Maegima
af07d1544e pico-imx6ul: Add DFU support
DFU is a convenient way to program U-boot binary into the eMMC.

Add support for it.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:49 +02:00
Diego Dorta
6d7aa51acc pico-imx6ul: Add Ethernet support
Pico-imx6ul has a KSZ8081 Ethernet PHY.

Add support for it.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2016-07-12 17:58:49 +02:00
Fabio Estevam
618a85356c mx7dsabresd: Fix the boot of a NXP kernel
Booting a NXP kernel with mainline U-boot leads to the following kernel
crash:

caam: probe of 30900000.caam failed with error -11
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = 80004000
[00000004] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT SMP ARM

This happens because NXP kernel expects MX7 to boot in secure mode,
so introduce mx7dsabresd_secure_defconfig that selects CONFIG_MX7_SEC
and allows booting a NXP provided kernel successfully.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:49 +02:00
Fabio Estevam
3039774309 mx7: Place MX7_SEC option in Kconfig
MX7_SEC is an existing configuration option that allows booting the
kernel in secure mode.

Place this option in Kconfig, so that boards can select this option
in their defconfig files.

Selecting this option is necessary when booting a kernel provided by
NXP, such as 3.14_GA and 4.1.15_GA.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Michael Trimarchi <michael@amarulasolutions.com>
2016-07-12 17:58:49 +02:00
Vanessa Maegima
d6b0c46818 mx6sxsabresd: Avoid hardcoded RAM size
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option,
we should better use imx_ddr_size() function, which automatically
determines the RAM size.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
2016-07-12 17:58:49 +02:00
Vanessa Maegima
432a8a5547 mx6sxsabreauto: Avoid hardcoded RAM size
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option,
we should better use imx_ddr_size() function, which automatically
determines the RAM size.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:49 +02:00
Vanessa Maegima
8259e9c9ad mx6slevk: Avoid hardcoded RAM size
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option,
we should better use imx_ddr_size() function, which automatically
determines the RAM size.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:49 +02:00
Gilles Chanteperdrix
e355eec79d wandboard: enable SATA with imx6q
Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
2016-07-12 17:58:48 +02:00
Vanessa Maegima
369012e7e9 mx6qsabreauto: Avoid hardcoded RAM size
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option,
we should better use imx_ddr_size() function, which automatically
determines the RAM size.

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:48 +02:00
Stefano Babic
876a25d289 mx6: Add Phytec PCM058 i.MX6 Quad
Add Phytec-i.MX6 SOM with NAND

  Support:
   - 1GB RAM
   - Ethernet
   - SPI-NOR Flash
   - NAND (1024 MB)
   - external SD
   - UART

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-12 17:58:48 +02:00
Stefano Babic
8be4f40ecf mx6: add support for el6x board
Custom Board based on MX6 Dual, 1GB RAM and eMMC.

There are two variants of the board with and without
PCIe (ZC5202 and ZC5601).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2016-07-12 17:58:48 +02:00
Hannes Schmelzer
0750701a3f driver/net/fec: support fixed speed connection
If MAC is directly connected to another MAC (like a switch for example)
we don't need to probe for a phy, autoneogation and so on. We simply
have to setup speed.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-07-12 17:58:48 +02:00
Stefano Babic
a32b4a03c7 pcie_imx: increment timeout for link up
On some boards, the current 20ms timeout
is hit. Increase it to 40mS.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2016-07-12 17:58:48 +02:00
Christopher Spinrath
c133c503ac ARM: board: cm-fx6: fix mmc for old revisions of utilite
Old revisions of Utilite (based on cm-fx6) do not have a dedicated
card detect pin. But the card is removable by the user and card
detection can be realized with polling (e.g. supported by Linux).

Add the broken-cd property to the mmc device tree instead of the
non-removable property to make card detection possible if polling
is supported.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
2016-07-12 17:58:48 +02:00
Petr Kulhavy
c1ebf54868 imx_common: Return MMCSD_MODE_FS in spl_boot_mode() also for EXTFS
spl_boot_mode() returned MMCSD_MODE_RAW on MMC if CONFIG_SPL_EXT_SUPPORT
was configured. EXTFS is the default filesystem selected in imx6_spl.h
and the function should return MMCSD_MODE_FS instead.

Fix this and return MMCSD_MODE_FS instead in such cases.

Signed-off-by: Petr Kulhavy <brain@jikos.cz>
CC: Stefano Babic <sbabic@denx.de>
CC: Tim Harvey <tharvey@gateworks.com>
CC: Fabio Estevam <Fabio.Estevam@freescale.com>
2016-07-12 17:58:47 +02:00
Tom Rini
b8e599746c Merge branch 'master' of git://git.denx.de/u-boot-x86 2016-07-12 08:15:17 -04:00
Simon Glass
9532fe3b40 x86: link: Correct a failure in DRAM init
With the change to set up pinctrl after relocation, link fails to boot. Add
a special case in the link code to handle this.

Fixes: d8906c1f (x86: Probe pinctrl driver in cpu_init_r())

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-07-12 13:59:45 +08:00
George McCollister
215099a522 x86: Add Advantech SOM-DB5800/SOM-6867 support
Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.

Currently supported:
 - 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on
   SOM-DB5800.
 - 4x USB 2.0 (EHCI)
 - Video
 - SATA
 - Ethernet
 - PCIe
 - Realtek ALC892 HD Audio
   Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO
   HDA_SDI0 is set in DT to enable HD Audio codec.
   Pin defaults for codec pin complexs are not changed.

Not supported:
 - Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500)
 - USB 3.0 (XHCI)
 - TPM

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-07-12 13:46:01 +08:00
Bin Meng
3ff11aaa50 x86: baytrail: acpi: Hide internal UART per GNVS setting
If global NVS says internal UART is not enabled, hide it in the ASL
code so that OS won't see it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-12 13:46:01 +08:00
Bin Meng
79c2c257cf x86: acpi: Pack global NVS into ACPI table
Now that platform-specific ACPI global NVS is added, pack it into
ACPI table and get its address fixed up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-12 13:46:01 +08:00
Bin Meng
cf7108b320 x86: quark: Introduce ACPI global NVS
This introduces quark-specific ACPI global NVS structure, defined in
both C header file and ASL file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-12 13:46:01 +08:00
Bin Meng
2047390abc x86: baytrail: Introduce ACPI global NVS
This introduces baytrail-specific ACPI global NVS structure, defined in
both C header file and ASL file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-12 13:46:01 +08:00
Stefan Roese
f2a751beba x86: conga-qeval20-qa3: Add support for internal UART
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.

This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-12 13:46:01 +08:00
Bin Meng
d9703a0725 x86: fsp: Wrap setup_internal_uart() call with CONFIG_INTERNAL_UART
For any FSP-enabled boards that want to enable debug UART support,
setup_internal_uart() will be called, but this API is only available
on BayTrail platform. Change to wrap it with CONFIG_INTERNAL_UART.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-12 13:46:01 +08:00