Commit graph

83649 commits

Author SHA1 Message Date
Frieder Schrempf
dfbdc69c5d imx: kontron-sl-mx8mm: Adjust devicetree names, compatibles and model strings
This adjusts the names of the boards and SoMs to the official naming
used by Kontron marketing. These changes also affect devicetree
names and compatibles. The same changes have been submitted to the
Linux kernel.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
3b846df8ab imx: kontron-sl-mx8mm: Prepare for other i.MX8MM SoM types
This sets an env variable 'som_type' from the board code. It can
later be used by environment scripts, e. g. to select the proper
devicetree for the board.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
3a683aefdf imx: kontron-sl-mx8mm: Use new LPDDR4 config parameters
These parameters are needed for stable performance on new hardware
with Nanya LPDDR4 chips.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
8dd0924ea0 imx: kontron-sl-mx8mm: Remove 100mt DDR setpoint
The new stable configuration is missing the 100mt setpoint, remove
it before updating the config to make sure the changes are separated
cleanly.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
890022f0cf imx: kontron-sl-mx8mm: lpddr4_timing.c: Add spaces for proper alignment
Fix the spaces and alignment for easier tracking of changes and comparing
with configs generated by the tools.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
e8d1efe8e8 imx: kontron-sl-mx8mm: Enable bootaux command
Enable the bootaux command in order to be able to load a
binary into the M4 core when needed.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
27effdd16b imx: kontron-sl-mx8mm: Migrate to use CONFIG_EXTRA_ENV_TEXT
Move the environment from the board header to a separate text file
and also drop those variables that are already set in env_default.h
from the Kconfig options.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
3f7f731653 imx: kontron-sl-mx8mm: Enable environment in MMC
In case we boot from SD card or eMMC, we also want to load
the environment from the according boot device.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
2a6f023061 imx: kontron-sl-mx8mm: Add redundant environment and SPI NOR partitions
Enable the redundant environment feature to allow falling back in case of
storage corruption. The partition layout for the SPI NOR device is added
to the devicetree.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
0761beef98 imx: kontron-sl-mx8mm: Enable MTD command
Enable the MTD command to be used for the SPI NOR on the SoM.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
42b200fa8f imx: kontron-sl-mx8mm: Increase CONFIG_SYS_CBSIZE to 2K
This allows using the command line with longer lines like
large scripts in env variables.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
ba7cd39e22 imx: kontron-sl-mx8mm: Remove custom board_boot_order() workaround
Nowadays detecting the SPI NOR as boot device from the ROMAPI is
fixed and works even if the SPI NOR is used as fallback boot device.

Therefore we don't need this workaround anymore.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
b39ff4d22a imx: kontron-sl-mx8mm: Add support for loading from SPI NOR in SPL
This was initially enabled, but got accidentally dropped while
migrating Kconfig options and resyncing the defconfig in:

commit 9802154a94 ("configs: Resync with savedefconfig")

Let's enable this again to be able to boot from SPI NOR.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
a06c6b2130 imx: kontron-sl-mx8mm: Remove LVDS board type and devicetrees
The display isn't and won't be used in U-Boot. Also the display setup
is not yet supported in mainline Linux, so even for cases where the
U-Boot devicetree is passed to the kernel there is currently no use
for this configuration.

Selecting the proper configuration in the kernel FIT image automatically
depending on the detected hardware can be handled by a script in the
environment.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
9ab5204628 imx: imx6ul: kontron-sl-mx6ul: Sync devicetrees
Sync the devicetrees with Linux and adjust the board names.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
7dd6af85bc imx: imx6ul: kontron-sl-mx6ul: Migrate to use CONFIG_EXTRA_ENV_TEXT
Move the environment from the board header to a separate text file
and also drop those variables that are already set in env_default.h
from the Kconfig options or are not needed anymore.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
93935acc6f imx: imx6ul: kontron-sl-mx6ul: Select correct boot and env device
Instead of checking both, SPI NOR and MMC for loading U-Boot proper
and the environment, implement a way to detect the actual boot
device even if the BootROM doesn't report it and we can't rely
solely on the fuse settings, as by default we use MMC as primary
boot device and boot from SPI NOR via the secondary fallback device
(EEPROM Recovery Mode).

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
234b3be98e imx: imx6ul: kontron-sl-mx6ul: Fix CONFIG_ENV_SPI_BUS
The SPI NOR is on ECSPI1 so CONFIG_ENV_SPI_BUS should be 1
to detect the environment on the SPI NOR.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
679356c0b2 imx: imx6ul: kontron-sl-mx6ul: Enable migrated Kconfig options
The board support was merged at the same time as some Kconfig options
for SPL were migrated/renamed. As a result some essential features
like serial output, MMC support, etc. are currently missing. Fix this
by enabling the required options.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-10-20 17:35:51 +02:00
Frieder Schrempf
c3587197c0 Makefile: Make flash.bin target available for all platforms
There is no reason for restricting the use of the flash.bin target
to the i.MX8 platform. Others can benefit from this as well.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-10-20 17:35:51 +02:00
Tim Harvey
37d5bf4287 board: gateworks: venice: rename eeprom_init
rename eeprom_init to avoid build failure when using CMD_EEPROM.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-10-20 17:35:51 +02:00
Tim Harvey
b872c93beb arm: dts: imx8mm-venice-gw7902: add LTE modem gpios
Add missing LTE_PWR# and LTE_RST gpio pinmux.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2022-10-20 17:35:51 +02:00
Tim Harvey
5c525acafc imx8*_venice_defconfig: configure default MMC env device
When booting from USB/SDP mmc_get_env_dev() returns
CONFIG_SYS_MMC_ENV_DEV as the MMC env device (while booting from MMC
will call board_mmc_get_env_dev() to get this). Configure
CONFIG_SYS_MMC_ENV_DEV for SDHC3 (devno=2) as all Gateworks Venice
boards use SDHC3 as eMMC so that persistent env works when booting from
USB/SDP.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-10-20 17:35:51 +02:00
Tom Rini
d843273a80 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-10-20 09:11:08 -04:00
Tom Rini
dc3cb0abf4 Clock patches for 2023.01
This contains various fixes (some long overdue) for the next release.
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Merge tag 'clk-2023.01' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock patches for 2023.01

This contains various fixes (some long overdue) for the next release.
2022-10-20 08:58:25 -04:00
Tom Rini
73ceadcd72 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Beside some rather unexciting sync of the DTs from the kernel tree, and
some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner
family, to support boards with the F1C200s (64MB DRAM) better. We will
get actual board support as soon as the DTs have passed the Linux review
process.
There is also support for the X96 Mate TV Box, featuring the H616 SoC and
a full 4GB of DRAM.
Also we found the secret to enable SPI booting on the H616 (pin PC5 must
be pulled to GND), so the SPI boot support patch is now good to go.

Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
X96 Mate and OrangePi Zero.
2022-10-20 08:58:05 -04:00
Rick Chen
b3b44c674a riscv: ae350: Check firmware_fdt_addr header
Check firmware_fdt_addr header to see if it
is a valid fdt blob.

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-10-20 15:26:31 +08:00
Yu Chien Peter Lin
bdb238355c riscv: andes_plic.c: use modified IPI scheme
The IPI scheme in OpenSBI has been updated to support 8-core AE350
platform, the plicsw configuration needs to be modified accordingly.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:23:41 +08:00
Bin Meng
cb052d7712 riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+
Since OpenSBI commit bf3ef53bb7f5 ("firmware: Enable FW_PIC by default"),
OpenSBI runs directly at the load address without any code movement.
This causes the SPL version of QEMU 'virt' U-Boot does not boot Linux
kernel anymore. In that case, OpenSBI is loaded and runs at 0x81000000,
and it creates a 512KiB PMP window from that address. When booting
the Linux kernel, moving kernel to its linking address 0x80200000
overlaps the PMP window, and a PMP access failure is raised.

Update SPL_OPENSBI_LOAD_ADDR to load OpenSBI to a safe address.

Reported-by: Yangjie Zhang <pyjmstr@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Yangjie Zhang <pyjmstr@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:33 +08:00
Heinrich Schuchardt
e77ef0bb74 k210: fix k210_pll_calc_config()
The k210 driver is selected by sandbox_defconfig.
Building the sandbox on 32bit systems fails with:

test/dm/k210_pll.c: In function ‘dm_test_k210_pll_calc_config’:
include/linux/bitops.h:11:38: warning:
left shift count >= width of type [-Wshift-count-overflow]
   11 | #define BIT(nr)         (1UL << (nr))
      |                              ^~
test/dm/k210_pll.c:36:54: note: in expansion of macro ‘BIT’
   36 |                         error = abs((error - BIT(32))) >> 16;
      |                                              ^~~

Use the BIT_ULL() macro to create a u64 value.
Replace abs() by abs64() to get correct results on 32bit system
Apply the same for the unit test.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-10-20 15:22:30 +08:00
Heinrich Schuchardt
e67f34f778 riscv: support building double-float modules
The riscv32 toolchain for GCC-12 provided by kernel.org contains libgcc.a
compiled for double-float. To link to it we have to adjust how we build
U-Boot.

As U-Boot actually does not use floating point at all this should not
make a significant difference for the produced binaries.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-10-20 15:22:21 +08:00
Heinrich Schuchardt
f22db44c1b cmd/sbi: user friendly short texts
In the sbi command use the same short texts for the legacy extensions
as the SBI specification 1.0.0.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:15 +08:00
Heinrich Schuchardt
72c1f5f282 cmd/sbi: error message for failure to get spec version
If calling 'Get SBI specification version' fails, write an error message
and return CMD_RET_FAILURE.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:15 +08:00
Heinrich Schuchardt
9487764e7e cmd/sbi: format RustSBI version number
The SBI command can print out the version number of the SBI implementation.
Choose the correct output format for RustSBI.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-10-20 15:22:15 +08:00
Patrick Delaunay
19fb40a5e7 clk: update clk_clean_rate_cache to use private clk struct
In clk_clean_rate_cache, clk->rate should update the private clock
struct, in particular when CCF is activated, to save the cached
rate value.

When clk_get_parent_rate is called, the cached information
is read from pclk->rate, with pclk = clk_get_parent(clk).

As the cached is read from private clk data, the update should
be done also on it.

Fixes: 6b7fd3128f ("clk: fix set_rate to clean up cached rates for the hierarchy")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220620153717.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid
Link: https://lore.kernel.org/r/20220712142352.RESEND.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid/
2022-10-19 12:28:30 -04:00
Michal Suchanek
aa36a74f0f rockchip: clk: pll: Fix constant typo
Fixes: bbda2ed584 ("rockchip: clk: pll: add common pll setting funcs")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Link: https://lore.kernel.org/r/20220928104129.13240-1-msuchanek@suse.de
2022-10-19 12:06:48 -04:00
Michal Suchanek
a1265cd580 clk: change return type of clk_get_parent_rate from long long to ulong
All functions getting and setting clock rate use ulong for rate, only
clk_get_parent_rate is an exception. Change the return value to match
other clock rate funcrions.

Most users directly assign the rate to unsigned long anyway, and the few
users that use u64 (not s64) multiply the rate so they may need the
extra bits for the result in their use case.

Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20220928103757.11870-1-msuchanek@suse.de
2022-10-19 12:06:41 -04:00
Andre Przywara
843ed983a0 suniv: add UART1 support
Some boards with the Allwinner F1C100s family SoCs use UART1 for its
debug UART, so define the pins for the SPL and the pinmux name and mux
value for U-Boot proper.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
b87fb19668 suniv: move SKIP_LOWLEVEL_INIT_ONLY into Kconfig
So far we stated the lack of a lowlevel() init function for the
Allwinner F1C100s board by defining the respective SKIP_* symbol in the
board's defconfig. However we don't expect any *board* to employ such
low level code, so expect this to be never used for the ARMv5 Allwinner
SoCs.

Select the appropriate symbols in the Kconfig, so that we can remove
them from the defconfig, and avoid putting them in future defconfigs for
other boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
c8b9ba4bb2 sunxi: fix 32MB load address layout
The default load addresses for the various payloads (kernel, DT,
ramdisk) on systems with just 32MB of DRAM have some issues:
For a start the preceding comment doesn't match the actual values:
apparently they were copied from the 64MB S3 layout, then halved, but
since 0x5 is NOT the half of 0x10, they don't match up.
Also those projected maximum sizes are quite restrictive: it's not easy
to build a compressed kernel image with just 4MB. The only defconfig in
mainline Linux that supports the F1C100s (the only 32MB user so far)
creates a 6MB compressed / 15MB uncompressed kernel.
Rearrange the default load addresses to accommodate such a kernel: we
allow an 7MB/16MB kernel, and up to 5MB of ramdisk, stuffing the smaller
binaries like the DTB towards the end, just before the relocated U-Boot.
Shrink the size for DTB and scripts on the way, there is no need for
allowing up to 512K for them.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
1bf98bd4e2 sunxi: Kconfig: introduce SUNXI_MINIMUM_DRAM_MB
Traditionally we assumed that every Allwinner board would come with at
least 256 MB of DRAM, and set our DRAM layout accordingly. This affected
both the default load addresses, but also U-Boot's own address
expectations (like being loaded at 160 MB).

Some SoCs come with co-packaged DRAM, but only provide 32 or 64MB. So
far we special-cased those *chips*, as there was only one chip per DRAM
size. However new chips force us to take a more general approach.

Introduce a Kconfig symbol, which provides the minimum DRAM size of the
board. If nothing else is specified, we use 256 MB, and default to
smaller values for those co-packaged SoCs.
Then select the different DRAM maps according to this new symbol, so
that different SoCs with the same DRAM size can share those definitions.

Inspired by an idea from Icenowy.

This is just refactoring: compiled for all boards before and after this
patch: the binaries were identical.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:15:02 +01:00
Icenowy Zheng
14b3c6d72a configs: sunxi: licheepi_nano: enable D-Cache
As the compile error when D-Cache is enabled is gone, we can have
D-Cache enabled now.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-19 14:15:02 +01:00
Icenowy Zheng
9a916b07fe sunxi: fix SUNIV build when enabling D-Cache
The enable_caches function in architecture-specific board code is only
necessary for V7A CPUs, code for both V8A and ARM926 have already
declared this function.

Only provide our implementation of enable_caches() for V7A CPUs.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-10-19 14:15:02 +01:00
Andre Przywara
a514577ce2 sunxi: defconfig: Add X96 Mate TV box
The X96 Mate TV box is a TV box with the Allwinner H616 SoC. It is
available with up to 4GB of DRAM and 64GB eMMC.
The DRAM chips require a different configuration when compared to the
OrangePi Zero2, we must not use read/write training and write leveling.

Add a defconfig for the box, so that we can easily build U-Boot for it.
We synced the .dts file already from the kernel tree.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19 14:14:55 +01:00
FUKAUMI Naoki
85a8ef1264 arm: dts: rockchip: rk356x: sync with Linux 6.0
prepare for rk3566 based board

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Simon Glass
70e351bdfe rockchip: jerry: Enable RESET driver
At present the display does not work since it needs the reset driver to
operate. Fix this by enabling it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd529f7ad6 ("rockchip: video: edp: Add missing reset support")
Fixes: 9749d2ea29 ("rockchip: video: vop: Add reset support")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
bd9b4ac9c5 rockchip: puma-rk3399: migrate to u-boot-rockchip-spi.bin
Now that a single binary containing TPL/SPL correctly formatted for SPI
flashes and U-Boot proper, can be generated by binman, let's do it.

Also update the documentation to tell the user to use this newly
generated file instead of manually generating and flashing the binaries.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
35f571b56c rockchip: puma-rk3399: migrate to u-boot-rockchip.bin
The offset of the SPL payload on Puma is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.

Flashing one binary instead of two at different offsets is much more
user friendly so let's migrate to it by modifying the offset in the Puma
specific Device Tree.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
2169e29c5a rockchip: puma-rk3399: migrate to TPL
Depending on the toolchain used to compile the SPL for Puma RK3399-Q7
module, the board does not boot because the resulting binary is too big
to fit in SRAM.

Let's add a TPL so that there's no need to fiddle with or hack the
defconfig to have a working bootloader.

This follows what's been done for the majority of other RK3399-based
boards.

See the original commit for the first migrations:
bdc0008011 "rockchip: rk3399: update defconfig for TPL"

Unfortunately, the offset in SPI-NOR for U-Boot proper needs to be
modified, since the move from SPL to TPL+SPL for idbloader.img (and the
"only the first 2KB per 4KB blocks are written" "hack" for rkspi format)
increased the size above 256KB. Let's move it to 512KB to, hopefully, be
safe.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00
Quentin Schulz
a913c03c16 rockchip: puma-rk3399: remove useless CONFIG_SYS_SPI_U_BOOT_OFFS
The SPL payload offset when booting from SPI defaults to
CONFIG_SYS_SPI_U_BOOT_OFFS but can be overridden by
u-boot,spl-payload-offset. The Device Tree for Puma Haikou has this
property so there's no need to have this one option in the defconfig,
especially since they are not in sync and therefore confusing.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19 19:30:49 +08:00