Commit graph

18564 commits

Author SHA1 Message Date
Jean-Jacques Hiblot
fb1b7712ad power: make most tps drivers and the twl4030 driver compatible with DM_I2C
Those driver are not DM drivers per se (not using the PMIC/regulator
framework) and are using the legacy I2C API. Make them compatible with
the DM_I2C API.

This impacts the following drivers:
- palmas (used by am57xx/dra7xx evms)
- tps65218 (used by am43xx evms)
- tps65217 and tps65910 (used by am335x evms and am335x boneblack vboot)
- twl4030 (used by omap3_logicpd)
- tps65217 (used by brppt1)
- twl6030

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:17:30 +01:00
Jean-Jacques Hiblot
3542ff29e4 dm: device: Allow using uclass_find_device_by_seq() without OF_CONTROL
If OF_CONTROL is not enabled and DM_SEQ_ALIAS is enabled, we must
assign an alias (requested sequence number) to devices that belongs to a
class with the DM_UC_FLAG_SEQ_ALIAS flag. Otherwise
uclass_find_device_by_seq() cannot be used to get/probe a device. In
particular i2c_get_chip_for_busnum() cannot be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-12-10 06:05:32 +01:00
Tom Rini
8cb8c0c6a8 Merge git://git.denx.de/u-boot-marvell
- Sync DDR training with Marvell code for Armada 38x by Chris
- Misc updates to Armada 38x Helios4 board by Aditya
2018-12-09 08:40:49 -05:00
Philipp Tomsich
51c2345bd2 Roll CRC16-CCITT into the hash infrastructure
The CRC16-CCITT checksum function is useful for space-constrained
applications (such as obtaining a checksum across a 2KBit or 4KBit
EEPROM) in boot applications. It has not been accessible from boot
scripts until now (due to not having a dedicated command and not being
supported by the hash infrstructure) limiting its applicability
outside of custom commands.

This adds the CRC16-CCITT (poly 0x1021, init 0x0) algorithm to the
list of available hashes and adds a new crc16_ccitt_wd_buf() to make
this possible.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[trini: Fix building crc16.o for SPL/TPL]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-08 20:18:44 -05:00
Philipp Tomsich
a740ee913e lib: merge CRC16-CCITT into u-boot/crc.h
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure.  Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-08 20:18:32 -05:00
Aditya Prayoga
8d7d97e2d1 arm: mvebu: helios4: Enable SPI flash support
Enable SPI flash support under U-Boot and SPL. The ENV size and offset,
ported from U-Boot 2013.01 Marvell version: 2015_T1.0p16

To create U-Boot image for SPI flash, user would need to replace
* CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC with CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
* CONFIG_ENV_IS_IN_MMC with CONFIG_ENV_IS_IN_SPI_FLASH

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
16b6aefafd arm: mvebu: helios4: Reduce U-Boot image size
Remove unused I2C support in SPL and use simple_malloc functions to
reduce SPL image size.
Since Helios4 does not have any PCIe allocated on SerDes, remove PCI
support. MTD layer on top of SPI flash is not needed, remove it also.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
a134d680ea arm: mvebu: helios4: mmc: move environment before 1M
Store the environment before 1M into the block device.
This constant is easier to remember, saves a little space,
and is in line with what SolidRun's 2018.01-based fork does for the
clearfog.

Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
[ Aditya Prayoga:
* Port forward]
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:40 +01:00
Tom Rini
c49aff3e66 Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
2018-12-07 19:02:01 -05:00
Olliver Schinagl
61436d502b power: axp209: Add support for voltage rate control on LDO3
The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.

This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.

There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.

In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
3f7d76a7ed power: axp209: Reduce magic values by adding defines for LDO[234]
The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
f5eebc7925 power: axp209: Define the chip version mask
Use a define for the chip version mask on the axp209.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
048447ce4a power: axp209: Use BIT() macro
Use the standard BIT() macro for bitfield definitions in headers.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Felix Brack
fdce9d35dc arm: dts: am33xx: Sync dts with Linux 4.20.0
This patch synchronizes the am33xx SoC specific files with those from
Linux 4.20.0. Hence all board maintainers of am33xx based boards are
on the cc list.
The main purpose of this patch is to prevent further diverging of the
dts files from U-Boot and those from Linux. It aims to set the stage
for the synchronization of board specific dts files. Example: I'm the
maintainer of the PDU001 board: once this patch is applied successfully
I will make changes to the board specific dts file in Linux only and
then post a patch with a copy of this exact dts file to U-Boot. This
will make U-Boot and Linux remain in sync.
The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
removed by the patch https://patchwork.ozlabs.org/patch/962428 from
Lokesh Vutla (many thanks!). This omap-serial driver allows using the
Linux am33xx.dtsi file in U-Boot.
Other changes to dts and dtsi files made by this patch are mainly to
prevent _new_ warnings during the build process. Especially the warning
at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
"ranges" or child "reg"' was not removed. This warning is a good example
showing the benefit of the synchronization: if it needs to be fixed it
will be fixed in Linux and ported back to U-Boot.
Buildman reports all 46 am33xx SoC based boards to build fine, with
warnings of course. Nevertheless this patch should be tested thoroughly
on as many boards as possible to prevent any collateral damage.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 08:13:51 -05:00
Heiko Schocher
8fb2391ea6 spl/tpl: change banner into upper case
commit d633006463 ("spl: Add a define for SPL_TPL_PROMPT")

changes the SPL/TPL banner from upper case into lower
case. As SPL and TPL are three-letter acronyms and they
are written in upper case, change it back to upper case.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 08:13:51 -05:00
Álvaro Fernández Rojas
27ab27f850 dma: add channels support
This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).

DMA channle API:
 dma_get_by_index()
 dma_get_by_name()
 dma_request()
 dma_free()
 dma_enable()
 dma_disable()
 dma_prepare_rcv_buf()
 dma_receive()
 dma_send()

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
 add metadata to send/receive ops, add dma_prepare_rcv_buf(),
 minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 08:13:45 -05:00
Álvaro Fernández Rojas
10b4dc5208 dma: move dma_ops to dma-uclass.h
Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-12-07 08:13:45 -05:00
Benjamin Gaignard
7f84fc670b dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Manivannan Sadhasivam
1bad5e1492 rockchip: rk3399: Add common Rock960 family from Vamrs
Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
96Boards.

Below are some of the key differences between both Rock960 and Ficus
boards:

1. Different host enable GPIO for USB
2. Different power and reset GPIO for PCI-E
3. No Ethernet port on Rock960

The common board support will be utilized by both boards. The device
tree has been organized in such a way that only the properties which
differ between both boards are placed in the board specific dts and
the reset of the nodes are placed in common dtsi file.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[Added instructions for SD card boot]
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2018-12-06 16:04:49 +01:00
Philipp Tomsich
63162724e2 usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t
The regs_phy field of the platform data structure for dwc2-otg is
today declared an unsigned int, but will eventually be cast into a
void* for a writel operation.  This triggers errors on modern GCC
versions.

E.g. we get the following error with GCC 6.3:
  drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
  arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
   #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
                               ^
  arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
   #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                                  ^~~~~~~~~~~
  drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel'
    writel(val, pdata->regs_phy + reg->offset);
    ^~~~~~

This commit changes regs_phy to be a uintptr_t to ensure that it is
large enough to hold any valid pointer (and fix the associated
warning).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 16:04:49 +01:00
Tom Rini
2a055ea532 Minor sandbox enhancements / fixes
tpm improvements to clear up v1/v2 support
 buildman toolchain fixes
 New serial options to set/get config
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAlwIe0gRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreY02wgAjK9U1ADmoNi4xWgtq83EerxOGTq68BRD
 CfnUDgI+FQHNv/LxdZ8lZ2lgGG1xXZ8mdeHWghllHoLEnwMQ3LxfDRnpkyC6VBE9
 LvZF4F7BhTnGsKImlloQ5oMhKI4sDKjqRkRL3D633x5dq9Z571obAyGwLMo67vv6
 U8iv1mRMr6au46pLvH25DF6h5LuM7TBSJVDlzmFmmD++r/YDroTJfo07qdo8sNqS
 0hDPjgp3uqf1mX2cbNHk56a3DmO9fL6Gcvdv0LHGQvRyfQ36TY+cEcDU2y2p+tl+
 t1LFamfZvalix9AyJegr3qGMOb9B20ar89EItXzH9J+ahnlZmEat+w==
 =VAMW
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dm

Minor sandbox enhancements  / fixes
tpm improvements to clear up v1/v2 support
buildman toolchain fixes
New serial options to set/get config
2018-12-05 20:32:25 -05:00
Tom Rini
9450ab2ba8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05 15:06:24 -05:00
Boris Brezillon
4a5594fa20 mtd: Don't stop MTD partition creation when it fails on one device
MTD partition creation code is a bit tricky. It tries to figure out
when things have changed (either MTD dev list or mtdparts/mtdids vars)
and when that happens it first deletes all the partitions that had been
previously created and then creates the new ones based on the new
mtdparts/mtdids values.
But before deleting the old partitions, it ensures that none of the
currently registered parts are being used and bails out when that's
not the case. So, we end up in a situation where, if at least one MTD
dev has one of its partitions used by someone (UBI for instance), the
partitions update logic no longer works for other devs.

Rework the code to relax the logic and allow updates of MTD parts on
devices that are not being used (we still refuse to updates parts on
devices who have at least one of their partitions used by someone).

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
a02820fca9 mtd: Delete partitions attached to the device when a device is deleted
If we don't do that, partitions might still be exposed while the
underlying device is gone.

Fixes: 2a74930da5 ("mtd: mtdpart: implement proper partition handling")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
4c47fd0b6b mtd: Add a function to report when the MTD dev list has been updated
We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.

Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Tom Rini
9649c5343f video, bmp and cls command updates
-----BEGIN PGP SIGNATURE-----
 
 iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCXAcZwg4cYWd1c3RAZGVu
 eC5kZQAKCRBM6ATMmsalXF2nAJsHxBDVCUwckh2HzMxdJfpjgbHy9gCeK2QPUUab
 uYPkAjrs8es/pkK6/QU=
 =qcJj
 -----END PGP SIGNATURE-----

Merge tag 'video-updates-for-2019.01-rc2' of git://git.denx.de/u-boot-video

video, bmp and cls command updates
2018-12-05 08:24:14 -05:00
Andy Shevchenko
4e7207791c serial: ns16550: Read reg-io-width from device tree
Cache the value of the reg-io-width property for the future use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:35 -07:00
Andy Shevchenko
0af761620f serial: ns16550: Group reg_* members of ns16550_platdata
Group reg_* members of struct ns16550_platdata together for better maintenance.

No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:35 -07:00
Andy Shevchenko
d5bb4f862b dm: serial: Introduce ->getinfo() callback
New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:31 -07:00
Andy Shevchenko
ac7f5db9dc dm: serial: Add ->getconfig() callback
In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Álvaro Fernández Rojas
7959882049 dm: core: add functions to get/remap I/O addresses by name
This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property.
This is needed in bmips dma/eth patch series, but can also be used on many
other drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Philipp Tomsich
759a99c242 dm: (re)sort uclass ids alphabetically
The comment in uclass-id.h states that
    "U-Boot uclasses start here - in alphabetical order"
but the subsequent list is not sorted alphabetically.
This reestablishes order.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-05 06:06:44 -07:00
Philipp Tomsich
a4b33c5aba dm: rtc: Fix function name in comment
The documentation comment for dm_rtc_set was referring to dm_rtc_put
instead. Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-05 06:06:44 -07:00
Simon Glass
bcb514ac02 Add inttypes.h
Even if U-Boot does not use this, some libraries do. Add back this header
file so that the build does not fall back to using the host version, which
may include stdint.h and break the build due to conflicts with uint64_t,
etc.

This partially reverts commit dee37fc99d ("Remove <inttypes.h> includes
and PRI* usages in printf() entirely")

The only change from the file that was in U-Boot until recently is that it
now comes twice as close to passing checkpatch. The remaining warnings
pertain to the typedefs, which checkpatch does not like.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
277f4eb2e8 Add UINT32_MAX and UINT64_MAX
These constants are defined by stdint.h but not by kernel.h, which is
its stand-in in U-Boot. Add the definitions so that libraries which expect
stdint.h constants can work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
49c751603c time: Update mdelay() to delay in one large chunk
The current function delays in one millisecond at a time. This does not
work well on sandbox since it results in lots of calls to usleep(1000) in
a tight loop. This makes the sleep duration quite variable since each call
results in a sleep of *at least* 1000us, but possibly more. Depending on
how busy the machine is, the sleep time can change quite a bit.

We cannot fix this in general, but we can reduce the effect by doing a
single sleep. The multiplication works fine with an unsigned long argument
up until a sleep time of about 4m milliseconds. This is over an hour and
we can be sure that delays of that length are not useful.

Update the mdelay() function to call udelay() only once with the
calculated delay value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
165be50f5a input: i8042: Use remove() instead of exported functions
We should not have exported functions in a driver. The i8042_disable()
function is used to disable the keyboard. Provide a remove() method
instead, which is the standard way of disabling a device.

We could potentially add a method to flush input but that does not seem
necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
be8a025ed7 tpm: Add non-volatile index attributes needed for v2
Version-2 TPMs support attributes for nvdata. Add definitions to the
header file so that clients can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
5e69b8bc04 tpm: Export tpm_clear_and_reenable()
This function is intended to be exported but is not. Add it to the header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
0a60a0a65f tpm: Remove use of build-time TPM versions
There is only one place in the code which assumes at build-time that we
are using either a v1 or a v2 TPM. Fix this up and add a new function to
return the version of a TPM.

Supported TPM versions (v1 and v2) can be enabled independently and it is
possible to use both versions at once. This is useful for sandbox when
running tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Marek Vasut
cbff9f80ce ARM: dts: rmobile: Sync Gen3 DTs with Linux 4.19.6
Synchronize DTs with mainline Linux 4.19.6 ,
commit 96db90800c06d3fe3fa08eb6222fe201286bb778

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
2018-12-04 09:21:07 +01:00
Marek Vasut
07a8060a12 ARM: rmobile: Convert to bootm_size
Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both
fdt_high and initrd_high. This change implies that the FDT and initrd
will always be copied into the first 256 MiB of RAM instead of being
used in place, which can cause various kinds of inobvious problems.

The simpler problems include FDT or initrd being overwritten or being
used from unaligned addresses, especially on ARM64. The overhead of
copying the FDT to aligned location is negligible and these problems
go away, so the benefit is significant.

Regarding alignment problems with fitImage. The alignment of DT properties
is always 32 bits, which implies that the alignment of the "data" property
in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The
kernel expects all elements, including DT and initrd, to be aligned to
64 bits on ARM64, thus using them in place may not be possible. Using the
bootm_size assures correct alignment, again with negligible overhead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-12-04 09:21:06 +01:00
Tom Rini
0a3d59e010 Xilinx changes for v2019.01
microblaze:
 - Use default functions for memory decoding
 - Showing model from DT
 
 zynq:
 - Fix spi flash DTs
 - Fix zynq_help_text with CONFIG_SYS_LONGHELP
 - Tune cse/mini configurations
 - Enabling cse/mini testing with current targets
 
 zynqmp:
 - Enable gzip SPL support
 - Fix chip detection logic
 - Tune mini configurations
 - DT fixes(spi-flash, models, clocks, etc)
 - Add support for OF_SEPARATE configurations
 - Enabling mini testing with current targets
 - Add mini mtest configuration
 - Some minor config setting
 
 nand:
 - arasan: Add subpage configuration
 
 net:
 - gem: Add 64bit DMA support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlwFUAkACgkQykllyylKDCHtIACeO2G+jfSPxIjsyuPWbRup4e+A
 H5UAn3knKDNJ3VVidqO1C5o8Ye5JePZF
 =lW3g
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support
2018-12-03 19:30:54 -05:00
Tom Rini
9981c60ef5 Patch queue for rpi - 2018-12-03
A few Raspberry Pi specific changes this time:
 
   - Allow 2nd MMC device
   - Support RPi 3 Model A+
   - Allow UUID to find filesystem
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJcBYNQAAoJECszeR4D/txgpdAQAL+JkA5pJeX2bSJy10Y1jTQa
 uD9R5uvRFmduXLMYgZPzc9FCOTbsO5DJvvERV+JidHDeNYIFVAuPo494fUZL3JGa
 Q+zUEDkO8lf2ybJCX5lg6EEZ2O/xzCZJqHs+cV5iPWJ//y0Hx6RuhfS0DGbPQuwN
 e7tlOZg178ZzXSmsNdqKGhNUgSXUTHKaJ5H02VJZ61oUo9/4Zmpsoc3flCrYDjme
 DAeVqDMex+UyqxfBrxMdvVUtdovMV6coF/hbZiHHogvjwNZCmBri0wmFaCmzheSj
 DCz3ec0MxdT3lM2n4otAWiB1x/UY8cwCiWkSzRlFCUNzlvUxVddWgghoH0uQYvzh
 u35EMmNPM4wV6J3RjS+klQyD5tSLoUG5m4DRUDX1KKhE3MFTnx89tTf7n4++/5bk
 Hke3p1KLDnYCvEffFAu/PAeKMpLFTAxZTZm5Nog/EO5dFV2M3NeS2GpAbXXQep3r
 0WfflWrvjjG7CnnDDWMxMxYSqNv/tC9gqTeML1dOt4P275s1NyDkFj0OebjoVoiI
 fnh3DALF4AMP2mDLrFFvoYP7LptSb/TiidH3IT/AwfjFiHGicVDufBqfUObfPKNE
 oUqkKzdKnuZ9Nq5HN9OuAxM4SkSKuXVJpGXef7yJ+BUrQylPjTCpOtxtRVpIumvK
 +vIMVysbLz0EqpuV8i2P
 =W6tE
 -----END PGP SIGNATURE-----

Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem
2018-12-03 17:52:53 -05:00
Tom Rini
f388e3bed7 Patch queue for efi - 2018-12-03
This release is fully packed with lots of glorious improvements in UEFI
 land again!
 
   - Make PE images more standards compliant
   - Improve sandbox support
   - Improve correctness
   - Fix RISC-V execution on virt model
   - Honor board defined top of ram (fixes a few boards)
   - Imply DM USB access when distro boot is available
   - Code cleanups
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJcBYKAAAoJECszeR4D/txgBgwQALmYioI67R5/Iizpv7bg+rIQ
 0TyPKZHmfHtVjGHd5X4X+9NBsoaSKqGnoI12bJ+V9hIMuiu5qFKyM3icTOOJ6LI6
 wggnvMWZl5nfZmdEgETHTmaZkQZzKwhzbftGlGf2j19FdDk1OOI7hRNLeaIZUTv0
 VHiUV68PP/1Of1y7iqB5jij1wTUHWlCufKjGXELP0bAXx86/tecgCuvjBihXizz/
 sMsCxEF8++pb5l/l4yFEkKd5rr5D/ZkKMLR4KniZVq2qP1S4calolP14ykHN+a/l
 uKP4e4GDuYyrgXXTNRFhVTlaAn18bmvxH4ialnpYVZKRtfsdHPHQXfqmgf8ZgJPE
 JK3mmG6eLCbBPeND2Yz3b7G/Ec04z+RJXx0hriyLdejLgp5jM9SBtygiz6FmQLpQ
 VfDJNEWV7ot6Ejou55O0d9u5ATF0jAd4tikmsrStWWZOVHvie6nG0wFYiRxnWCKP
 sid0p7lWSUKEl0sAvA0LglNMzd4tCAq7vtkfLj/BVrDc9Jpir9CVJ13ppXIGk1HC
 YIGWLo0uXAGC9wgRE7ZgGCKtQ6VFZRbSiJQOowi4MrHzHXH218oSNz2w25tAVTBw
 le2WbxlGNYhV1xnoWMks1GTdWGQDCXdfBAhfzRIvQq2kz4z9V8hzpnVDIk2ZL3L1
 o3nqUatR0ZVXPcinf+Ke
 =6o9t
 -----END PGP SIGNATURE-----

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-12-03

This release is fully packed with lots of glorious improvements in UEFI
land again!

  - Make PE images more standards compliant
  - Improve sandbox support
  - Improve correctness
  - Fix RISC-V execution on virt model
  - Honor board defined top of ram (fixes a few boards)
  - Imply DM USB access when distro boot is available
  - Code cleanups
2018-12-03 17:52:40 -05:00
Simon Glass
06696ebe67 video: Allow driver to specify the line length
At present line_length is always calculated in video_post_probe(). But
some hardware may use a different line length, e.g. with a 1366-wide
display.

Allow the driver to set this value if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-12-03 19:09:44 +01:00
Christophe Leroy
42b54013a0 drivers: serial: get rid of non DM mpc8xx driver
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Philippe Reynes
061daa0b61 rsa: add support of padding pss
We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Philippe Reynes
20031567e1 rsa: add a structure for the padding
The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Lukasz Majewski
d27db67e6b Kconfig: Migrate CONFIG_RTC_M41T62 define to Kconfig
This patch moves the RTC M41T62 config define to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00