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1121 commits

Author SHA1 Message Date
Marek Vasut
6254c5f7e1 serial: sh: Make indent consistent
Make the indent of these macro elements consistent with the
rest of this table. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:04:02 +01:00
Marek Vasut
836d1bfffa serial: sh: Add DEBUG_UART support
Add support for debug output very early during boot using the DEBUG_UART
mechanism. This uses a static fixed UART port configuration selected via
Kconfig options and dedicated print functions from debug_uart.h. This is
useful e.g. when debugging problems so early during boot, that not even
the DM is initialized at that point, and thus DM_SERIAL is not available
either.

This functionality is disabled by default. To activate it, define the
following Kconfig options and select SCIF type using CFG_SCI/CFG_SCIF_A/
CFG_HSCIF/<nothing for regular SCIF>:

CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_SCIF=y
CONFIG_DEBUG_UART_BASE=0xe6540000
CONFIG_DEBUG_UART_CLOCK=24000000

The later two options define the SCIF physical base address and SCIF
input clock in Hz. Optionally, to validate DEBUG_UART works, enable
the following as well to get early serial output message by default:

CONFIG_DEBUG_UART_ANNOUNCE=y

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:04:02 +01:00
Marek Vasut
5e12d7d00b serial: sh: Rename CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK to CFG_ variants
Both CONFIG_SCI and CONFIG_SCIF_USE_EXT_CLK options do not have a
matching Kconfig entry because they are internal to the SCIF driver.
Change their prefix to CFG_, i.e. CFG_SCIF_USE_EXT_CLK and CFG_SCI,
to reflect that and avoid interferring with Kconfig symbols. Since
neither of those options are defined elsewhere, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-18 12:04:02 +01:00
Simon Glass
68be8d95de Correct SPL uses of OF_BOARD
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_OF_BOARD defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
2023-02-10 07:41:41 -05:00
Simon Glass
43512276da Correct SPL use of DEBUG_UART_ZYNQ
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_DEBUG_UART_ZYNQ defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-09 16:32:26 -05:00
Simon Glass
69f06c8da6 rmobile: Drop CONFIG_SH73A0 and associated code
This option does not exist, so the code attached to it is not used. Drop
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Loic Poulain
ad725073d1 serial: mxc: Speed-up character transmission
Instead of waiting for empty FIFO condition before writing a
character, wait for non-full FIFO condition.

This helps in saving several tens of milliseconds during boot
(depending verbosity).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Loic Poulain
7150f56a85 serial: mxc: Wait for TX completion before reset
The u-boot console may show some corrupted characters when
printing in board_init() due to reset or baudrate change
of the UART (probe) before the TX FIFO has been completely
drained.

To fix this issue, and in case UART is still running, we now
try to flush the FIFO before proceeding to UART reinitialization.
For this we're waiting for Transmitter Complete bit, indicating
that the FIFO and the shift register are empty.

flushing has a 4ms timeout guard, which is normally more than
enough to consume the FIFO @ low baudrate (9600bps).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Mark Kettenis
053827b3c3 serial: s5p: Use IS_ENABLED where appropriate
There are no SPL/TPL variants of CONFIG_CLK_EXYNOS and
CONFIG_ARCH_APPLE, so switch from CONFIG_IS_ENABLED to
IS_ENABLED.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27 14:32:55 -05:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
c50c778ea7 usbtty: Remove default CONFIG_USBD_* values
For this legacy driver, the only user sets these values in Kconfig, so
we can remove them from the header.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:23 -05:00
Stefan Bosch
5745de2c9d arm: s5p4418: dm_serial: switch to DM_SERIAL
Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to
DM_SERIAL.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Stefan Bosch
5ec6cbcc7f arm: s5p4418: dm_serial: add driver source code
Add dm_serial driver source code for S5P4418 SOC. Extend the "arm,pl011"
driver by init of UART-clock and UART-reset.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Pali Rohár
1138bbe05e serial: Use -EAGAIN in getc and putc
U-Boot serial code already handles -EAGAIN value from getc and putc
callbacks. So change drivers code to return -EAGAIN when HW is busy instead
of doing its own busy loop and waiting until HW is ready.

Signed-off-by: Pali Rohár <pali@kernel.org>
2023-01-02 16:01:40 -05:00
Pali Rohár
59440d83d3 serial: Do not write additional \r before \n for dm_serial drivers
serial-uclass.c code already puts \r before \n for all dm_serial drivers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-02 16:01:40 -05:00
Tom Rini
1e01950333 post: Move CONFIG_SYS_POST to CFG_SYS_POST
Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST
namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 13:01:13 -05:00
Tom Rini
0478dac62a kbuild: Remove uncmd_spl logic
At this point in the conversion there should be no need to have logic to
disable some symbol during the SPL build as all symbols should have an
SPL counterpart.

The main real changes done here are that we now must make proper use of
CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we
developed prior to CONFIG_IS_ENABLED() being available.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
61693acbce global: Migrate CONFIG_USART_ID to CFG
Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
805482d187 global: Migrate CONFIG_USART_BASE to CFG
Perform a simple rename of CONFIG_USART_BASE to CFG_USART_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:12 -05:00
Tom Rini
dbfaeecf59 global: Migrate CONFIG_SCIF_A to CFG
Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:11 -05:00
Tom Rini
b861574bd9 global: Migrate CONFIG_PL01x_PORTS to CFG
Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
f410d0ac8a global: Migrate CONFIG_PL011_CLOCK to CFG
Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
4db386655a global: Migrate CONFIG_MXC_UART_BASE to CFG
Perform a simple rename of CONFIG_MXC_UART_BASE to CFG_MXC_UART_BASE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:14:51 -05:00
Tom Rini
0c3a6d443f usb: Remove CONFIG_USBD_HS
This define is not enabled by the only platform which currently enables
the legacy option of CONFIG_USB_DEVICE. We can drop this code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-22 10:31:49 -05:00
Tom Rini
9cebc4ad8e post: Migrate to Kconfig
We move the existing CONFIG_POST_* functionality over to CFG_POST and
then introduce CONFIG_POST to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:11:50 -05:00
Tom Rini
d5596cbc6e arm: lpc32xx: Remove unused hsuart driver
This driver is not enabled in any config currently, remove it.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Tom Rini
91092132ba global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Tom Rini
9591b63531 Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_NS16550_MIN_FUNCTIONS
   CONFIG_SYS_NS16550_MEM32
   CONFIG_SYS_NS16550_PORT_MAPPED
   CONFIG_SYS_NS16550_REG_SIZE
   CONFIG_SYS_NS16550_SERIAL

To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:06:07 -05:00
Tom Rini
57c3afbc27 powerpc: Rename CONFIG_NS16550_MIN_FUNCTIONS
This symbol is specific to the PowerPC SPL implementation, so rename
this to reflect that it's in SPL and used / tested there, so that we can
then safely migrate it to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:05:38 -05:00
Edoardo Tomelleri
66006f86e8 arm: amlogic: add setbrg op to serial device
Implement setbrg in amlogic/meson serial device with driver model
similar to how the meson_uart.c driver does it in Linux. Also
configure (probe) the serial device with the new reg5 register.

Signed-off-by: Edoardo Tomelleri <e.tomell@gmail.com>
Link: https://lore.kernel.org/r/20220918161701.572814-1-e.tomell@gmail.com
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-11-22 18:53:21 +01:00
Fabio Estevam
fc1c1760de Revert "serial: mxc: have putc use the TXFIFO"
This reverts commit c7878a0483.

Since commit c7878a0483 ("serial: mxc: have putc use the TXFIFO"),
serial console corruption can be seen when priting inside board_init().

Revert it to avoid the regression.

Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
2022-11-12 14:16:26 +01:00
Simon Glass
b86986c7b3 video: Rename CONFIG_DM_VIDEO to CONFIG_VIDEO
Now that all the old code is gone, rename this option. Driver model
migration is now complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Simon Glass
70cc7b614f video: Drop use of the lcd header file
This file is being removed so drop remaining references to it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-30 20:07:17 +01:00
Michal Suchanek
c726fc01cf dm: treewide: Use uclass_first_device_err when accessing one device
There is a number of users that use uclass_first_device to access the
first and (assumed) only device in uclass.

Some check the return value of uclass_first_device and also that a
device was returned which is exactly what uclass_first_device_err does.

Some are not checking that a device was returned and can potentially
crash if no device exists in the uclass. Finally there is one that
returns NULL on error either way.

Convert all of these to use uclass_first_device_err instead, the return
value will be removed from uclass_first_device in a later patch.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17 21:17:12 -06:00
Tom Rini
ffa2c88bcf Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next 2022-09-26 11:27:30 -04:00
Pali Rohár
989cc40f80 serial: Call flush() before changing baudrate
Changing baudrate is a sensitive operation. To ensure that U-Boot messages
printed before changing baudrate are not lost, call new U-Boot console
flush() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:38 -04:00
Pali Rohár
78b5243182 serial: Implement serial_flush() function for console flush() fallback
Like in all other console functions, implement also serial_flush() function
as a fallback int console flush() function.

Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
enabled. So when it is disabled then provides just empty static inline
function serial_flush().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:37 -04:00
Pali Rohár
016e2be96d serial: Implement flush callback
UART drivers have putc/puts functions which just put characters into HW
transmit queue and do not wait until all data are transmitted.

Implement flush callback via serial driver's pending(false) callback which
waits until HW transmit all characters from the queue.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 10:47:01 -04:00
Weijie Gao
3b17f2e2c2 serial: mtk: add support for using dynamic baud clock souce
The baud clock on some platform may change due to assigned-clock-parent
set in DT. In current flow the baud clock is only retrieved during probe
stage. If the parent of the source clock changes after probe stage, the
setbrg will set wrong baudrate.

To get the right clock rate, this patch records the baud clk struct to the
driver's priv, and changes the driver's flow to get the clock rate before
calling _mtk_serial_setbrg().

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-09-23 15:09:15 -04:00
Tom Rini
e9a1ff9724 Merge branch 'master' into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-19 16:07:12 -04:00
Marek Vasut
c34edb893a usb: gadget: designware-udc: Drop the driver
This driver is not used by any system and is long unmaintained, drop it.
There is a DWC2 OTG driver which is maintained, see CONFIG_USB_GADGET_DWC2_OTG .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-09-19 17:45:51 +02:00
Johannes Schneider
c7878a0483 serial: mxc: have putc use the TXFIFO
only waiting for TXEMPTY leads to corrupted messages going over the
wire - which is fixed by making use of the FIFO

this change is following the linux kernel uart driver
(drivers/tty/serial/imx.c), which also checks UTS_TXFULL
instead of UTS_TXEMPTY

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Johannes Schneider
25b7ce3287 serial: mxc: enable the RX pipeline
on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire
(as observable on a connected 'scope) to actually make it into the
RXFIFO

the reference manual is not overly clear about this, and only
mentiones that "UCR3_RXDMUXSEL should always be set." - and since the
CR3 register reverts to its reset values after setting the baudrate,
setting this bit is done during '_mxc_serial_setbgr'

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-09-18 22:56:10 +02:00
Stefan Roese
29caf9305b cyclic: Use schedule() instead of WATCHDOG_RESET()
Globally replace all occurances of WATCHDOG_RESET() with schedule(),
which handles the HW_WATCHDOG functionality and the cyclic
infrastructure.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
2022-09-18 10:26:33 +02:00
Kunihiko Hayashi
c6bceb4e36 serial: zynq: Use DIV_ROUND_CLOSEST() to calcurate divider value
Since the calulation of "bgen" is rounded down, using a higher
baudrate will result in a larger difference from the actual
baudrate. Should use DIV_ROUND_CLOSEST() like the Linux driver.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1657676339-6055-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-07-26 08:23:55 +02:00
Pali Rohár
5e998b4de3 serial: ns16550: Wait in debug_uart_init until tx buffer is empty
Commit d293759d55 ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.

But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.

Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).

Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add comment, move ';' to new line per checkpatch.pl]
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-08 12:20:04 -04:00
Tom Rini
a457ebd786 arm: Remove PXA architecture support
With the last platform for this architecture removed, remove the rest of
the architecture support as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-07-07 09:29:08 -04:00
Tom Rini
c316ee674f Xilinx changes for v2022.10
cpu:
 - Add driver for microblaze cpu
 
 net:
 - Add support for DM_ETH_PHY to AXI emac and emaclite
 
 xilinx:
 - Switch platforms to DM_ETH_PHY
 - DT chagnes in ZynqMP and Zynq
 - Enable support for SquashFS
 
 zynqmp:
 - Add support for KR260 boards
 - Move BSS from address 0
 - Move platform identification from board code to soc driver
 - Improve zynqmp_psu_init_minimize
 
 versal:
 - Enable loading app at EL1
 
 serial:
 - Setup default address and clock rates for DEBUG uarts
 
 pinctrl:
 - Add support for tri state and output enable properties
 
 relocate-rela:
 - Clean relocate-rela implementation for ARM64
 - Add support for Microblaze
 
 microblaze:
 - Add support for runtime relocation
 - Rework cache handling (wiring, Kconfig) based on cpuinfo
 - Remove interrupt support
 
 timer:
 - Extract axi timer driver from Microblaze to generic location
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYrlYngAKCRDKSWXLKUoM
 ITgbAJ9S9xO2QqxtuodWAYMtJfvZ14c7mgCeKnyFTrrBnJkC0wPsGqE71oNJ49o=
 =3gGm
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location
2022-06-27 10:15:50 -04:00
Michal Simek
ad55d99e3c serial: Setup serial base and freq for zynq/zynqmp
Setup default values for debug console, base address and frequency.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com
2022-06-24 14:11:05 +02:00