This adds coverage of core features of the builder, including the
command-line options which affect building.
Signed-off-by: Simon Glass <sjg@chromium.org>
For reasons that are not well-understood, GetMetaDataForList() can end up
adding to an existing series even when it appears that it should be
starting a new one.
Change from using a default constructor parameter to an explicit one, to
work around this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
For testing it is useful to clean the output directory before running a
test. This avoids a test interfering with the results of a subsequent
test by leaving data around.
Add this feature as an optional parameter to the control logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a build is to be performed, buildman checks to see if it has already
been done. In most cases it will not bother trying again. However, it was
not reading the return code from the 'done' file, so if the result was a
failure, it would not be counted. This depresses the 'failure' count stats
that buildman prints in this case.
Fix this bug by always reading the return code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than reading boards.cfg, which may take time to generate and is not
necessarily suitable for running tests, create our own list of boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
These files may not exist in the environment, or may not be suitable for
testing. Provide our own config file and our own toolchains when running
tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the bsettings code back to the main buildman.py file, so we can do
something different when testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Buildman currently lacks testing in many areas, including its use of git,
make and many command-line flags.
Add a functional test which covers some of these areas. So far it does
a fake 'build' of all boards for the current source tree.
This version reads the real ~/.buildman and boards.cfg files. Future work
will improve this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test point for the command module. This allows tests to emulate
the execution of commands. This provides more control (since we can make
the fake 'commands' do whatever we like), makes it faster to write tests
since we don't need to set up as much environment, and speeds up test
execution.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to be able to issue parser commands from within buildman for test
purposes. Move the parser code into its own file so we don't end up needing
the buildman and test modules to reference each other.
Signed-off-by: Simon Glass <sjg@chromium.org>
RunPipe() currently pipes the output of stdout and stderr to a pty, but
this is not the intended behaviour. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust the basic test so that it checks all console output. This will help
to ensure that the builder is behaving correctly with printing summary
information.
Signed-off-by: Simon Glass <sjg@chromium.org>
To allow us to verify the builder's console output, send it through a
function which can collect it when running in test mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
When running unit tests we don't want output to go to the terminal.
Provide a way of collecting it so that it can be examined by test code
later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit fa9c021632 ("mx6: add example DTB for mx6qsabreauto") introduced
'imx6q-sabreauto.dts' but it adds no real value as the dts file only contains
the 'model' and 'compatible' strings.
After this commit the final binary is also changed from 'u-boot.imx' to
'u-boot-dtb.imx', which may confuse users.
So revert it until a more complete and useful device tree could be provided.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
nitrogen6x.h file defines CONFIG_CMD_FS_GENERIC, so we are able to use generic
'load' command instead of 'fatload'. It allows to use ext filesystem and keep
compatibilty with fat filesystem.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Stefano Babic <sbabic@denx.de>
Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
Currently mx6dlsabresd shares the same DCD settings with the nitrogen board.
Provide a DCD configuration file specific to mx6dlsabresd with the settings
recommended by the Freescale hardware team.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
UART does not use the UART FIFO, but we should also not rely that
the UART FIFO is diabled by default. For instance, when loading
U-Boot using the boot ROMs serial downloader protocol over UART,
FIFO is enabled at U-Boot start time.
This patch disables the RX and TX FIFO, sets back their thresholds
and flushes them.
Signed-off-by: Stefan Agner <stefan@agner.ch>
The status register 1 (S1) is not writeable, hence we should not
write it. In order to clear the RDRF flag we only need to read
the data register.
Also, when stressing U-Boot a lot with serial input, an overflow can
occur which asserts the S1_OR flag (while not asserting the S1_RDRF
flag). To clear this flag we again just need to read the data
register, hence add this flag to the abort conditions for the while
loop.
Insert a compiler barrier to make sure reading the data register
gets executed after reading the status register.
Signed-off-by: Stefan Agner <stefan@agner.ch>
The load region size of EIM-NOR are defined to 0. For this case,
the parameter "imximage_init_loadsize" must be calculated.
The imximage tool implements the calculation in the "imximage_generate"
function, but the following function "imximage_set_header" resets the value
and not calculate. This bug cause some fields of IVT head are not
correct, for example the boot_data and DCD overlay the application area.
Signed-off-by: Ye.Li <B37916@freescale.com>
The Latency parameters of PL310 Tag RAM latency control register and
Data RAM Latency control register are set in L2 cache enable. And
setting these registers must have PL310 NOT enabled.
But when using Plugin mode boot, the PL310 is enabled by bootrom.
The patch disables the PL310 before applying this setting.
Signed-off-by: Ye.Li <Ye.Li@freescale.com>
The leds array within struct ventana has space for 3 elements, but the
setup_board_gpio() function tries to set up 4 GPIOs for LEDs. Recent
versions of GCC complain about that:
board/gateworks/gw_ventana/gw_ventana.c: In function 'setup_board_gpio':
board/gateworks/gw_ventana/gw_ventana.c:987:27: warning: iteration 3u invokes undefined behavior [-Waggressive-loop-optimizations]
if (gpio_cfg[board].leds[i])
^
board/gateworks/gw_ventana/gw_ventana.c:986:2: note: containing loop
for (i = 0; i < 4; i++) {
^
Fix this by making the upper bound of the loop match the array size.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
According to mx53 and mx6 reference manuals:
"The maximum size of the DCD limited to 1768 bytes."
As each DCD entry consists of 8 bytes, we have a total of 1768 / 8 = 221, and
excluding the first entry, which is the header leads to 220 as the maximum
number for DCD size.
Reported-by: Jonas Karlsson <jonas.d.karlsson@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Nitin Garg <nitin.garg@freescale.com>
Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion.
These boards use GPIO on the PLX device as PERST# for the downstream ports
thus we assert this when the PLX is enumerated.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add support for SATA.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Use Compulab eeprom module to obtain revision number, serial number, and
mac address from the EEPROM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add support for all 3 I2C busses on Compulab CM-FX6 CoM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add USB and USB OTG host support for Compulab CM-FX6 CoM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add ethernet support for Compulab CM-FX6 CoM
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add initial support for Compulab CM-FX6 CoM.
Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Current way of calculation CS0_END field for MMDCx_MDASP register
is problematic because in most cases the user is forced to define
cs_density in an unnatural way: as value - 2, instead of value.
This breaks the abstraction provided by struct mx6_ddr_sysinfo
because the user is forced to be aware of the way the calculation
is performed.
Refactor the calculation.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
According to MX6 TRM, both MMDC and DRAM should be configured to
the same powerdown precharge. Currently, mx6_dram_cfg()
configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for
'slow exit (DLL off)' (MR0[12] = 0).
Configure MMDC for slow pd.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Bit 16 in mapsr register is in a reserved field. Don't write to it.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Add macro which defines i2c_pads_info structs for multiple SoC types,
and a macro which selects the appropriate struct based on CPU type,
thus eliminating the need to manage multiple i2c pad configurations
manually when supporting multiple SoC types.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Define the new common function sata_port_status() which can be
used to query the sata driver for the state of ports, and implement it
for dwc_ahsata.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Create CONFIG_SYS_I2C_EEPROM_BUS #define to tell the EEPROM
module what I2C bus the EEPROM is located at. Make cl_eeprom_read()
switch to that bus when reading EEPROM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
There are many similarities between the IMX6QUAD/IMX6DUAL and there are
many similarities between the IMX6SOLO/IMX6DUALITE. Add a 'soctype' env
variable that tells you which type you have.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The GW5520 has an IMX6Q SoC with 512MB of DDR3, 256MB of NAND flash as well as:
* 2x MiniPCIe sockets
* 2x USB host sockets
* 2x i210 GigE
* HDMI out
* digital I/O expansion
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The IMX6 MMDC calibration registers depend on propagation delay and capacitive
loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the
board layout varies little in trace-lengths such that propagation delays are
irrelevant thus we can simply things by using calibration values obtained
from various board layouts based on a common SoC and DDR chip configuration.
This eliminates board-model from being needed allowing more flexibility. These
values were tested on a large sample size of Gateworks Ventana boards ranging
in layout, and memory configuration over the entire temperature range supported.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
