Commit graph

63 commits

Author SHA1 Message Date
Semih Hazar
2c05fd1257 AVR32: Change prototype of memset
Signed-off-by: Semih Hazar <semih.hazar@indefia.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-08-27 14:56:29 +02:00
Dirk Behme
f7c086e94e Move 64bit division from avr32 to generic lib
Move the 64bit division from lib_avr32 to lib_generic. With this, all
boards can do_div/__div64_32 if needed, not only avr one. Code is put
to lib_generic, so no larger memory footprint if not used. No code
modifications. Thanks for proposal by Håvard Skinnemoen.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
2007-08-10 10:33:34 +02:00
Wolfgang Denk
b99c1e6d8e Merge with /home/wd/git/u-boot/custodian/u-boot-avr32; code cleanup. 2007-04-18 16:53:52 +02:00
Haavard Skinnemoen
fc26c97bb6 Atmel MCI driver
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.

The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.

Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 16:14:06 +02:00
Haavard Skinnemoen
05fdab1ef6 AVR32: Add clk and gpio infrastructure for mmci
Implement functions for configuring the mmci pins, as well as
functions for getting the clock rate of the mmci controller.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 16:14:06 +02:00
Haavard Skinnemoen
b4ec9c2d43 AVR32: Add clk and gpio infrastructure for macb0 and macb1
Implement functions for configuring the macb0 and macb1 pins, as
well as functions for getting the clock rate of the various
busses the macb ethernet controllers are connected to.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 16:14:06 +02:00
Haavard Skinnemoen
12f099c081 AVR32: Use initdram() instead of board_init_memories()
Conform to the "standard" interface and use initdram() instead of
board_init_memories() on AVR32. This enables us to get rid of the
sdram_size member of the global_data struct as well.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 15:20:27 +02:00
Haavard Skinnemoen
1f4f2121c2 AVR32: Relocate u-boot to SDRAM
Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 15:20:27 +02:00
Haavard Skinnemoen
df548d3c3e AVR32: Resource management rewrite
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.

As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 15:20:27 +02:00
Haavard Skinnemoen
03d1e13657 AVR32: Clean up memory-map.h for at32ap7000
Convert spaces to tabs (must have missed this one last time around),
sort the entries by address and group them together by bus
connectivity.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-04-14 15:20:27 +02:00
Haiying Wang
3a197b2fe4 [PATCH v3] Add sync to ensure flash_write_cmd is fully finished
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-02-21 16:52:31 +01:00
Wolfgang Denk
72a087e047 Add AT32AP CPU and AT32AP7000 SoC support
Patch by Haavard Skinnemoen, 06 Sep 2006

This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.

The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2006-10-24 14:27:35 +02:00
Wolfgang Denk
7b64fef33c Add AVR32 architecture support
Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200

This patch adds common infrastructure code for the Atmel AVR32
architecture. See doc/README.AVR32 for details.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2006-10-24 14:21:16 +02:00