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70486 commits

Author SHA1 Message Date
Heinrich Schuchardt
28cef9ca2e fs: fat: create correct short names
The current function set_name() used to create short names has the
following deficiencies resolved by this patch:

* Long names (e.g. FOO.TXT) are stored even if a short name is enough.
* Short names with spaces are created, e.g. "A     ~1.TXT".
* Short names with illegal characters are created, e.g. "FOO++BAR".
* Debug output does not not consider that the short file name has no
  concluding '\0'.

The solution for the following bug is split of into a separate patch:

* Short file names must be unique.

This patch only provides the loop over possible short file names.

Fixes: c30a15e590 ("FAT: Add FAT write feature")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:58 +01:00
Heinrich Schuchardt
d236e825a2 fs: fat: export fat_next_cluster()
Rename function next_cluster() to fat_next_cluster() and export it.

When creating a new directory entries we should reuse deleted entries.
This requires re-scanning the directory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-10 09:14:58 +01:00
Heinrich Schuchardt
c5924118c0 fs: fat: correct first cluster for '..'
The FAT specification [1] requires that for a '..' directory entry pointing
to the root directory the fields DIR_FstClusHi and DIR_FstClusLo are 0.

[1] Microsoft FAT Specification, Microsoft Corporation, August 30 2005

Fixes: 31a18d570d ("fs: fat: support mkdir")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-12-10 09:14:58 +01:00
Tom Rini
2a42de6df1 - Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
 - Enable internal pull-ups for SDMMC1 on DHCOM SoM
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Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
2020-12-09 11:36:41 -05:00
Marek Vasut
9b36b7dc96 ARM: dts: stm32: Add USB OTG ID pin on DH AV96
Add USB OTG ID pin mux and switch the USB OTG port
from peripheral to OTG mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
1399be91cb ARM: dts: stm32: Enable SDMMC3 on DH DRC02
The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
75df748b87 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
845c6720ec ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
b52b9330c6 .mailmap: map Patrick Delaunay and my email address
Add our new email address dedicated for upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
5905e0880a MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emails
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Manuel Reis
81d4c4e45c add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition

Voids the need to set such partition as bootable to work with the
'dev:auto' tuple

Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Tom Rini
19ea606109 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2020-12-08 09:53:03 -05:00
Alexandru Gagniuc
03f1f78a9b spl: fit: Prefer a malloc()'d buffer for loading images
Fit images were loaded to a buffer provided by spl_get_load_buffer().
This may work when the FIT image is small and fits between the start
of DRAM and SYS_TEXT_BASE.

One problem with this approach is that the location of the buffer may
be manipulated by changing the 'size' field of the FIT. A maliciously
crafted FIT image could place the buffer over executable code and be
able to take control of SPL. This is unacceptable for secure boot of
signed FIT images.

Another problem is with larger FIT images, usually containing one or
more linux kernels. In such cases the buffer be be large enough so as
to start before DRAM (Figure I). Trying to load an image in this case
has undefined behavior.
For example, on stm32mp1, the MMC controller hits a RX overrun error,
and aborts loading.
    _________________
   |    FIT Image    |
   |                 |
  /===================\                        /=====================\
  ||      DRAM       ||                        |        DRAM         |
  ||                 ||                        |                     |
  ||_________________||  SYS_TEXT_BASE         | ___________________ |
  |                   |                        ||     FIT Image     ||
  |                   |                        ||                   ||
  | _________________ |  SYS_SPL_MALLOC_START  || _________________ ||
  ||  malloc() data  ||                        |||  malloc() data  |||
  ||_________________||                        |||_________________|||
  |                   |                        ||___________________||
  |                   |                        |                     |

        Figure I                                       Figure II

One possibility that was analyzed was to remove the negative offset,
such that the buffer starts at SYS_TEXT_BASE. This is not a proper
solution because on a number of platforms, the malloc buffer() is
placed at a fixed address, usually after SYS_TEXT_BASE. A large
enough FIT image could cause the malloc()'d data to be overwritten
(Figure II) when loading.

          /======================\
          |        DRAM          |
          |                      |
          |                      |   CONFIG_SYS_TEXT_BASE
          |                      |
          |                      |
          | ____________________ |   CONFIG_SYS_SPL_MALLOC_START
          ||   malloc() data    ||
          ||                    ||
          || __________________ ||
          |||    FIT Image     |||
          |||                  |||
          |||                  |||

                 Figure III

The solution proposed here is to replace the ad-hoc heuristics of
spl_get_load_buffer() with malloc(). This provides two advantages:
    * Bounds checking of the buffer region
    * Guarantees the buffer does not conflict with other memory

The first problem is solved by constraining the buffer such that it
will not overlap currently executing code. This eliminates the chance
of a malicious FIT being able to replace the executing SPL code prior
to signature checking.

The second problem is solved in conjunction with increasing
CONFIG_SYS_SPL_MALLOC_SIZE. Since the SPL malloc() region is
carefully crafted on a per-platform basis, the chances of memory
conflicts are virtually eliminated.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2020-12-07 17:40:34 -05:00
Tom Rini
cd833de059 Merge branch '2020-12-07-bootm-and-spl-atf-improvements' into next
- Series to improve "bootm" by allowing variable evaluation within the
  cmdline we would be passing.  This will help with Chrome OS but can be
  useful elsewhere.
- Improve ATF (TF-A) support within SPL.
2020-12-07 17:16:23 -05:00
Tom Rini
ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00
Tom Rini
8c5ea5361c configs: migrate CONFIG_IMX_THERMAL to defconfigs
Done via moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-12-07 08:54:29 +01:00
Baruch Siach
6cb007a1c7 imx8mp_evk: README instruction fixes
Use the full name of firmware self extracting file to make it run.

Also, don't use sudo when not needed.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-12-07 08:54:29 +01:00
Oliver Graute
eb38171034 doc: board: imx8qm-rom7720-a1.rst: convert readme to reST
Convert README to reStructuredText format.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2020-12-07 08:54:20 +01:00
Claudiu Beznea
8454cf0d23 clk: at91: sam9x60: remove the parsing of atmel, main-osc-bypass
Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60
have no support for crystal oscillator bypass. Setting this bit might
affect the device functionality.

Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-12-07 09:36:45 +02:00
Pali Rohár
061c6d1b23 arm: mvebu: Espressobin: Detect presence of emmc at runtime
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.

This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
2020-12-07 07:11:37 +01:00
Pali Rohár
135973967b arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.

Code for emmc is extracted from commit f1a43c84a9 ("arm64: dts: a3720:
add support for espressobin with populated emmc").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
2020-12-07 07:11:37 +01:00
Pali Rohár
c5c4b69857 Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit f1a43c84a9.
2020-12-07 07:11:37 +01:00
Pali Rohár
338c5ee26a Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit 03bb6a9b1e.
2020-12-07 07:11:37 +01:00
Joshua Scott
28f0cbcdd2 arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.

As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Luka Kovacic
5115de8d64 arm: mvebu: puzzle-m801: Add a maintainer
Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Igor Opaniuk
89f7d08b2a colibri-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
5d39967dcf apalis-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
90311be09f apalis-imx8: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
2f36a693e3 imx8: allow overriding memory layout
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
3730106cf0 doc: board: apalis-imx8x: add documentation
This documents the u-boot build and deployment procedure.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
a51fdba3fa board: toradex: add apalis-imx8x 2gb wb it v1.1a module support
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
3d1103cefc ARM: dts: fsl-imx8qxp-apalis: add initial device tree
Introduce initial hierarchy of device trees for Apalis iMX8X
System on Module.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Tim Harvey
bc479b2118 imx8m: fix cache setup for dynamic sdram size
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
72a1b9a977 verdin-imx8mm: automatic ram size detection
Implement board_phys_sdram_size() to automatically detect Verdin iMX8M
Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB.

Note: This only works if we keep using similar RAM chips!

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
2a1a2559fb toradex: tdx-cfg-clock: fix i.mx 8m mini interactive
Now with them first Verdin iMX8M Mini DualLite modules in for bring-up
we got clarity how is_cpu_type() actually behaves.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
b8eecbac6a verdin-imx8mm: spl: enable pca9450 i2c level translator
Enable PCA9450 i2c level translator, as this is used for the
on module ADC.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
423ca964c3 verdin-imx8mm: implement hardware version detection
And select the correct devicetree accordingly by setting the variant
environment variable.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
7d43807d6c verdin-imx8mm: spl: switch to pca9450 pmic
V1.1A HW switched the PMIC from BD71837 to PCA9450.

- Disable combined DVS in PCA9450_BUCK123_DVS.
- Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM.
- Configure WDOG_B behaviour.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
caafc6c497 ARM: dts: imx8mm-verdin: follow changed pmic
The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A.
Adjust the device tree accordingly.
Remove the old ADC node as the ADC has been changed and has no longer
a separate power rail.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
8f9abdf4d4 power: pmic: add SPL_DM_PMIC_PCA9450 symbol to Kconfig
Add SPL_DM_PMIC_PCA9450 symbol to Kconfig.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
5d89afe27f pca9450a: fix i2c address
The I2C address is 0x25, not 0x35. This according to the datasheet and
tests with a PCA9450A.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:37 +01:00
Marcel Ziswiler
a5b5ad4d85 toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skus
Add new i.MX 8M Mini/Plus SKUs to ConfigBlock handling:

0058: Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT

0059: Verdin iMX8M Mini Quad 2GB IT

0060: Verdin iMX8M Mini DualLite 1GB WB IT

0061: Verdin iMX8M Plus Quad 2GB

Rename existing SKU (use correct one):
Verdin iMX8M Nano SoloLite 1GB -> Verdin iMX8M Nano Quad 1GB Wi-Fi

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2020-12-06 15:31:37 +01:00
Haibo Chen
5d772196d9 mmc: fsl_esdhc_imx: optimize the timing setting
For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the
card clock will be divied by 2 automatically by the host. So need
to first config the DDR_EN correctly, then update the card clock.
This will make sure the actual card clock is as our expected.
IC also suggest config the DDR_EN firstly, then config the clock
divider.

For HS400/HS400ES mode, need to config the strobe dll, this need
to based on the correct target clock rate, so need to do this after
clock rate is update.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-12-06 15:31:37 +01:00
Oliver Graute
ea51af2fdd imx: imx8qm_rom7720_a1: add missing DTS to the MAINTAINERS
add the dts file to the MAINTAINERS entry

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:37 +01:00
Ian Ray
4f1970f437 board: ge: bx50v3: check b850v3 power management watchdog
Set `bootcause' from b850v3 power management watchdog status.

Boot cause "REVERT" is no longer used, remove it.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:37 +01:00
Ian Ray
559aaa2526 board: ge: reduce VPD EEPROM partition size
Reduce vital product data size to match the latest specification.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:37 +01:00
Sebastian Reichel
2d86fb31bd board: ge: bx50v3: reduce magic numbers
Use VPD product ID instead of confidx, so that we can easily reuse the
product ID defines and avoid some magic numbers.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00
Sebastian Reichel
822e1b31bd board: ge: bx50v3: drop unused pinmux defines
Remove pinmux defines, that are no longer used after
converting the code to devicetree.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00
Ian Ray
f2ac6f7796 board: ge: bx50v3: correct CONFIG_CMD_NFS
Fix typo in NFS command configuration check.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:36 +01:00