At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.
Move the compatibility features into a separate header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For the correct power cycle sequence with stm32_sdmmc2, the write of the
power cycle value in PWRCTL field of SDMMC_POWER register is now done in
stm32_sdmmc2_host_power_cycle() and no more in stm32_sdmmc2_pwrcycle().
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This patch solves a watchdog reset issue during mmc erase command.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Increase SDMMC_BUSYD0END_TIMEOUT_US from 1s to 2s to
avoid timeout error during blocks erase on some sdcard
Issue seen on Kingston 16GB :
Device: STM32 SDMMC2
Manufacturer ID: 27
OEM: 5048
Name: SD16G
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
card capabilities: widths [4, 1] modes [SD Legacy, SD High Speed (50MHz)]
host capabilities: widths [4, 1] modes [MMC legacy, SD Legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz)]
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
Issue reproduced with following command:
STM32MP> mmc erase 0 100000
MMC erase: dev # 0, block # 0, count 1048576 ... mmc erase failed
16384 blocks erased: ERROR
By setting SDMMC_BUSYD0END_TIMEOUT_US at 2 seconds and by adding
time measurement in stm32_sdmmc2_end_cmd() as shown below:
+start = get_timer(0);
/* Polling status register */
ret = readl_poll_timeout(priv->base + SDMMC_STA,
status, status & mask,
SDMMC_BUSYD0END_TIMEOUT_US);
+printf("time = %ld ms\n", get_timer(start));
We get the following trace:
STM32MP> mmc erase 0 100000
MMC erase: dev # 0, block # 0, count 1048576 ...
time = 17 ms
time = 1 ms
time = 1025 ms
time = 54 ms
time = 56 ms
time = 1021 ms
time = 57 ms
time = 56 ms
time = 1020 ms
time = 53 ms
time = 57 ms
time = 1021 ms
time = 53 ms
time = 57 ms
time = 1313 ms
time = 54 ms
time = 56 ms
time = 1026 ms
time = 54 ms
time = 56 ms
time = 1036 ms
time = 54 ms
time = 56 ms
time = 1028 ms
time = 53 ms
time = 56 ms
time = 1027 ms
time = 54 ms
time = 56 ms
time = 1024 ms
time = 54 ms
time = 56 ms
time = 1020 ms
time = 54 ms
time = 57 ms
time = 1023 ms
time = 54 ms
time = 56 ms
time = 1033 ms
time = 53 ms
time = 57 ms
....
time = 53 ms
time = 57 ms
time = 1021 ms
time = 56 ms
time = 56 ms
time = 1026 ms
time = 54 ms
time = 56 ms
1048576 blocks erased: OK
We see that 1 second timeout is not enough, we also see one measurement
up to 1313 ms. Set the timeout to 2 second to keep a security margin.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
- [-Wmissing-prototypes]
- [-Wimplicit-fallthrough=]
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
On response type r1b, if DTIME is not defined or too short,
the Datatimeout and DPSM flag occurs. Like the DPSM is
activated all next data transfer will be frozen.
To avoid this freeze:
-The driver must define a DTIME on all r1b response type.
-DTIME of SDMMC must be defined for alls stop transmission
(for read and write request) even if MMC_RSP_BUSY is not set.
-If busy timeout occur, an abort request must be sent to
reinitialize the DPSM.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Correctly manage the SDMMC reset and card cycle power
to fully handle the power cycle added in the MMC uclass
and avoid issue with level-shifter with some uSDCARD.
3 states managed in driver:
1/ reset: SDMMC disable, signal HiZ
2/ power-cycle: SDMMC disable, signals drive to 0
3/ power-on: SDMMC enabled
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
SDMMC_CMD_CPSMEN bit is wrongly check and set in
SDMMC_ARG register instead of SDMMC_CMD register.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.
This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.h
and replaces include directives:
#include <libfdt.h> -> #include <linux/libfdt.h>
#include <libfdt_env.h> -> #include <linux/libfdt_env.h>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
MMC commands like MMC_CMD_ALL_SEND_CID or MMC_CMD_SEND_CSD can reach
500 us. This patch increases the polling status register delay to avoid
a timeout on a command.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch adds SD/MMC support for STM32H7 SoCs.
Here is an extraction of SDMMC main features, embedded in
STM32H7 SoCs.
The SD/MMC block include the following:
_ Full compliance with MultiMediaCard System Specification
Version 4.51. Card support for three different databus modes:
1-bit (default), 4-bit and 8-bit.
_ Full compatibility with previous versions of MultiMediaCards
(backward compatibility).
_ Full compliance with SD memory card specifications version 4.1.
(SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
SPI mode and UHS-II mode not supported).
_ Full compliance with SDIO card specification version 4.0.
Card support for two different databus modes: 1-bit (default)
and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
speed, SPI mode and UHS-II mode not supported).
_ Data transfer up to 208 Mbyte/s for the 8 bit mode.
(depending maximum allowed IO speed).
_ Data and command output enable signals to control external
bidirectional drivers.
The current version of the SDMMC supports only one SD/SDIO/MMC card
at any one time and a stack of MMC Version 4.51 or previous.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
