Commit graph

28360 commits

Author SHA1 Message Date
Gerald Van Baren
3596d55eb2 Merge git://www.denx.de/git/u-boot into uboot 2008-03-29 18:08:02 -04:00
Daniel Hellstrom
97bf85d784 MTD/CFI: flash_read64 is defined a weak function (for SPARC)
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.

For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.

Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-03-29 06:51:04 +01:00
Joakim Tjernlund
70431e8a73 Make MPC83xx one step closer to full relocation.
Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 18:51:54 -05:00
Michael Barkowski
5b2793a3f3 mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.

It also makes the board take MAC addresses, if found, from EEPROM.

User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr.  Any unused addresses should be zero.  This group of
four six-byte values should have it's CRC at the end.  crc32 and
eeprom commands can be used to accomplish this.

If CRC fails, MAC addresses come from the environment.  If CRC
succeeds, the environment is overwritten at startup.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Michael Barkowski
8f325cff31 mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Commit 55774b512f broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.

This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Kim Phillips
e5c4ade4db mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
in the spirit of commit 1ced121600,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display.  Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler.  Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:01:06 -05:00
Kim Phillips
81fd52c6c8 mpc83xx: display ddr frequency in board_add_ram_info banner
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:32:09 -05:00
Kim Phillips
35cf155c5e mpc83xx: unreinvent mem_clk
delete ddr_clk and use mem_clk instead.  Rename other ddr_*_clk to
mem_*_clk for consistency's sake.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:32:07 -05:00
Kim Phillips
730e792926 mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boards
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:31:23 -05:00
Dave Liu
2eeb3e4fc5 mpc83xx: enable the SATA interface on mpc837xemds board
Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:15:44 -05:00
Dave Liu
6f8c85e8d1 mpc83xx: initialize serdes for MPC837xEMDS boards
This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.

The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.

8377E: LYNX1- 2 SATA	LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII	LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA	LYNX2- 2 SATA

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:11:51 -05:00
Stefan Roese
cc8e839abc ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-28 14:09:04 +01:00
Tor Krill
90447ecbba MTD/CFI: Add support for 16bit legacy AMD flash
Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback

Signed-off-by: Tor Krill <tor@excito.com>
2008-03-28 11:44:23 +01:00
Stefan Roese
5e12e75d17 ppc: Small change to CFG_MEM_TOP_HIDE description
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-28 11:02:53 +01:00
Nobuhiro Iwamatsu
280df59a8d sh: Add support stat structure and stat.h
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:14 +09:00
Mark Jonas
4be9eb789e sh: Removed warning when compiling drivers/serial/serial_sh.c.
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:14 +09:00
Nobuhiro Iwamatsu
f309fa3892 sh: Remove disable_ctrlc function from R7780MP
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
6f4b266ff2 sh: Add maintainer of R7780MP to MAINTAINER file
Update MAINTAINER entry for R7780MP. And fix maintainer's name.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
f5e2466f7b sh: Add support Renesas Solutions R2D plus board
R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
e92c95180b sh: Add support SH4 cache control
Add support SH4 cache control and flash_cache function

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
28e5efde4d sh: Add support PCI host driver for SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
ab8f4d40d0 sh: Move SuperH PCI driver from cpu/sh4 to drivers/pci
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
5669332781 sh: Add support SuperH SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Mark Jonas
3313e0e262 sh: Added support for SH7720 based board MPR2.
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Nobuhiro Iwamatsu
3ecff1d70a sh: Fix receive FIFO level register of SH4A
Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Yusuke Goda
c133c1fb0b sh: Add support Renesas Solutions R7780MP
Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Yusuke Goda
1a2334a4eb sh: Add support PCI of SuperH and SH7780
This patch add support PCI of SuperH base code and SH7780 specific code.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Yusuke Goda
b55523efff sh: Add support SH7780
SH7780 is CPU of Renesas Technology.
This CPU has
 - CPU clock 400MHz
 - PCI support
 - DDR-SDRAM controller
 - etc ...

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
goda.yusuke
c2042f5952 sh: Add support Renesas Solutions Migo-R board
Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:11 +09:00
Bartlomiej Sieka
74d1e66d22 Fix host tool build breakage, take two
Revert commit 87c8431f and fix build breakage so that the build continues
to work on FC systems.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-27 23:49:12 +01:00
Stefan Roese
7e4a0d25ed ppc4xx: Enable ECC on LWMON5
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.

We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 11:01:49 +01:00
Larry Johnson
6433fa202a ppc4xx: Updates to Korat-specific code
This patch contains updates for changes for the Korat PPC440EPx board.
These changes include:

(1) Support for "permanent" and "upgradable" copies of U-Boot, as
described in the new "doc/README.korat" file;

(2) a new memory map for the registers in the board's CPLD;

(3) a revised format for manufacturer's data in serial EEPROM; and

(4) changes to track updates to U-Boot for the Sequoia board.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-03-27 10:52:03 +01:00
Markus Brunner
f766cdf89b ppc4xx: PPC405EP Set EMAC noise filter bits
This bug was introduced with commit aee747f19b
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.

Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:47:28 +01:00
Mike Nuss
f66e2c8b25 ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.

Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-27 10:38:54 +01:00
Haavard Skinnemoen
87c8431fe2 new-image: Fix host tool build breakage
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-03-27 10:30:45 +01:00
Stefan Roese
6fb4b64056 ppc: Set CFG_MEM_TOP_HIDE to 0 if not already defined
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:24:03 +01:00
Stefan Roese
9462732a3e ppc4xx: Add fdt support to Prodrive alpr
Since this board will probably be ported to arch/powerpc in the
near future, we add device tree support now. This way we are
"ready" for arch/powerpc from now on.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:20:02 +01:00
Pieter Voorthuijsen
511e4f9e7f ppc4xx: Enable cache support on the ALPR board
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
2008-03-27 10:19:57 +01:00
Stefan Roese
14f73ca679 ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.

This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:

CHIP_11: End of memory range area restricted access.
Category: 3

Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.

Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.

Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.

This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia

The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:

PMC440.h:
/* esd expects pram at end of physical memory.
 * So no logbuffer at the moment.
 */

It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:12:07 +01:00
Stefan Roese
c664bf8c3c ppc4xx: Fix Canyonlands linker script (remove bogus ASSERT)
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:09:05 +01:00
Stefan Roese
d56a3ce179 ppc4xx: Correctly pass phyiscal FLASH base address into dtb
The routine ft_board_setup() configures the EBC NOR mappings for the
Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from
0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS
problem, we need to pass the corrected address here too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
9ad31989de ppc4xx: Fix compilation warning in 4xx_enet.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
4c9e855734 ppc4xx: Add AMCC Glacier 406GT eval board support
This patch adds support for the AMCC Glacier 460GT eval board.
The main difference to the Canyonlands board are listed here:

- 4 ethernet ports instead of 2
- no SATA port
- no USB port

Currently EMAC2+3 are not working. This will be fixed in a later
release.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
d8bd643141 ppc4xx: Mask 'vec' with 0x1f in uic_interrupt() for bit set/clear
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:03 +01:00
Wolfgang Denk
234ea73c66 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-03-27 00:19:13 +01:00
Anatolij Gustschin
b9670dd85b Fix out of tree building issue
Currently U-Boot building in some external directory
doesn't work. This patch tries to fix the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:18:58 +01:00
Wolfgang Denk
38b189fe74 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-03-27 00:16:34 +01:00
Wolfgang Denk
0207fefa4d Merge branch 'master' of git://www.denx.de/git/u-boot-usb 2008-03-27 00:16:18 +01:00
Anatolij Gustschin
d4ee711d8a README: update documentation (availability, links, etc.)
Fix typo in README

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:13:42 +01:00
Anatolij Gustschin
e813eae3bf Fix compilation error in cmd_usb.c
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:12:56 +01:00