Commit graph

12 commits

Author SHA1 Message Date
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Andreas Bießmann
f4278b716c avr32: fixup definitions to ATMEL_BASE_xxx
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:50 +02:00
Andreas Bießmann
5d73bc7af7 avr32: rename memory-map.h -> hardware.h
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2011-05-18 07:56:50 +02:00
Haavard Skinnemoen
1f36f73fe7 avr32: Add simple paging support
Use the MMU hardware to set up 1:1 mappings between physical and virtual
addresses. This allows us to bypass the cache when accessing the flash
without having to do any physical-to-virtual address mapping in the CFI
driver.

The virtual memory mappings are defined at compile time through a sorted
array of virtual memory range objects. When a TLB miss exception
happens, the exception handler does a binary search through the array
until it finds a matching entry and loads it into the TLB. The u-boot
image itself is covered by a fixed TLB entry which is never replaced.

This makes the 'saveenv' command work again on ATNGW100 and other boards
using the CFI driver, hopefully without breaking any rules.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2010-09-03 15:13:02 +02:00
Haavard Skinnemoen
9cec2fc209 avr32: Use uncached() macro to get an address for SDRAM init
The paging system which is required to set up caching properties has not
yet been initialized when the SDRAM is initialized. So when the
map_physmem() function is converted to return the physical address
unchanged, the SDRAM initialization will break on some boards.

The avr32-specific uncached() macro will return an address which will
always cause uncached accessed to be made. Since this happens in the
board code, using avr32-specific features should be ok, and will allow
the SDRAM initialization to keep working.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2010-09-03 15:12:52 +02:00
Haavard Skinnemoen
cb54732052 Merge branch 'fixes' into cleanups
Conflicts:

	board/atmel/atngw100/atngw100.c
	board/atmel/atstk1000/atstk1000.c
	cpu/at32ap/at32ap700x/gpio.c
	include/asm-avr32/arch-at32ap700x/clk.h
	include/configs/atngw100.h
	include/configs/atstk1002.h
	include/configs/atstk1003.h
	include/configs/atstk1004.h
	include/configs/atstk1006.h
	include/configs/favr-32-ezkit.h
	include/configs/hammerhead.h
	include/configs/mimc200.h
2008-12-17 16:53:07 +01:00
Ben Warren
89973f8a82 Introduce netdev.h header file and remove externs
This addresses all drivers whose initializers have already
been moved to board_eth_init()/cpu_eth_init().

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Haavard Skinnemoen
25e6854d42 avr32: use board_early_init_r instead of board_init_info
Replace the avr32-specific board_init_info hook by the standard
board_early_init_r hook and make it optional.

board_early_init_r() runs somewhat earlier than board_init_info used to
do, but this isn't a problem for any of the in-tree boards.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-01 14:21:35 +02:00
Haavard Skinnemoen
36d375faf5 avr32: Use board_postclk_init instead of gclk_init
Replace the avr32-specific gclk_init() board hook with the standard
board_postclk_init() hook which is supposed to run at the same point
during initialization.

Provide a dummy weak alias for boards not implementing this hook. The
cost of this is:
  - 2 bytes for the dummy function (retal 0)
  - 2 bytes for each unnecessary function call (short rcall)

which is a pretty small price to pay for avoiding lots of #ifdef
clutter. In this particular case, all boards probably end up slightly
smaller because we avoid the conditional checking if the gclk_init
symbol is NULL.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-01 14:21:34 +02:00
Haavard Skinnemoen
abdde2b1d5 hammerhead: Use gclk helper functions
Use the new gclk helper functions to set up the PHY clock instead of
accessing the PM registers directly.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-01 14:21:34 +02:00
Haavard Skinnemoen
ab0df36fc7 avr32: refactor the portmux/gpio code
- Separate the portmux configuration functionality from the GPIO pin
    control API.
  - Separate the controller-specific code from the chip-specific code.
  - Allow "ganged" port configuration (multiple pins at once).
  - Add more flexibility to the "canned" peripheral select functions:
      - Allow using more than 23 address bits, more chip selects, as
	well as NAND- and CF-specific pins.
      - Make the MACB SPEED pin optional, and choose between MII/RMII
	using a parameter instead of an #ifdef.
      - Make it possible to use other MMC slots than slot 0, and support
	different MMC/SDCard data bus widths.
  - Use more reasonable pull-up defaults; floating pins may consume a
    lot of power.
  - Get rid of some custom portmux code from the mimc200 board code. The
    old gpio/portmux API couldn't really handle its requirements, but
    the new one can.
  - Add documentation.

The end result is slightly smaller code for all boards. Which isn't
really the point, but at least it isn't any larger.

This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if
the board maintainers could help me test this on their boards. In
particular, the mimc200 port has lost a lot of code, so I'm hoping Mark
can help me out.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Mark Jackson <mpfj@mimc.co.uk>
Cc: Alex Raimondi <alex.raimondi@miromico.ch>
Cc: Julien May <julien.may@miromico.ch>

Changes since v1:
  * Enable pullup on NWAIT
  * Add missing include to portmux-pio.h
  * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
2008-09-01 14:20:41 +02:00
Julien May
5c374c9ee1 Add support for the hammerhead (AVR32) board
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

For more information see: http:///www.miromico.com/hammerhead

Signed-off-by: Julien May <mailinglist@miromico.ch>
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-07-30 10:06:11 +02:00