Commit graph

11 commits

Author SHA1 Message Date
Simon Glass
83061dbd1c Rename GPIO_SUPPORT to GPIO
Rename these options so that CONFIG_IS_ENABLED can be used with them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28 14:29:36 -04:00
Weijie Gao
70a2b4220e pinctrl: mediatek: do not probe gpio driver if not enabled
The mtk pinctrl driver is a combination driver with support for both
pinctrl and gpio. When this driver is used in SPL, gpio support may not be
enabled, and this will result in a compilation error.

To fix this, macros are added to make sure gpio related code will only be
compiled when gpio support is enabled.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20 16:24:27 -04:00
Sam Shih
e254d2c0a4 pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrl
This patch add get_pin_muxing support for mediatek pinctrl drivers

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-20 16:24:27 -04:00
Sam Shih
4fc5d4cedb pinctrl: mediatek: fix wrong assignment in mtk_get_pin_name
This is a bug fix for mtk pinctrl common part. Appearently pins should be
used instead of grps in mtk_get_pin_name().

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-20 16:24:27 -04:00
Heinrich Schuchardt
97bf73762f pinctrl: mediatek: correct error handling
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-01-18 15:23:06 -05:00
David Woodhouse
e05fdd9364 pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
The pins for the MMC controller weren't being set up correctly because the
pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
handle the special cases with PUPD/R0/R1 control.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-07-29 08:43:40 -04:00
Sean Anderson
082faeb865 dm: Fix error handling for dev_read_addr_ptr
dev_read_addr_ptr had different semantics depending on whether OF_LIVE was
enabled. This patch converts both implementations to return NULL on error,
and converts all call sites which check for FDT_ADDR_T_NONE to check for
NULL instead. This patch also removes the call to map_physmem, since we
have dev_remap_addr* for those semantics.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-01 15:01:21 +08:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Sam Shih
cf400b63b4 pinctrl: mediatek: add support for different pinctrl
Due to the pinctrl hardware of MT7622 is difference from others
SoC which using the common part of mediatek pinctrl.
So we need to modify the common part of mediatek pinctrl.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Fabien Parent
e66b202eb3 pinctrl: mediatek: fix warning
Fix the following warning when CONFIG_PINCONF=n:

drivers/pinctrl/mediatek/pinctrl-mtk-common.c:35:36:
warning: ‘mtk_drive’ defined but not used [-Wunused-const-variable=]
 static const struct mtk_drive_desc mtk_drive[] = {
                                    ^~~~~~~~~

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2019-07-29 09:32:10 -04:00
Ryder Lee
01aa9d1d54 pinctrl: MediaTek: add pinctrl driver for MT7629 SoC
This patch adds pinctrl support for MT7629 SoC. The IO core found on
the SoC has the registers for pinctrl, pinconf and gpio mixed up in
the same register range.  Hence the driver also implements the gpio
functionality through UCLASS_GPIO.

This also creates a common file as there might be other chips that use
the same binding and driver, then being a little more abstract could
help in the long run.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-28 23:04:52 -05:00