On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address. Also, the target IDs
on CoreNet platforms have been completely re-assigned.
Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet style boot release code since it will need
to determine what the target ID should be set to for boot window
translation.
Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
it elsewhere.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added various p2020 processor specific details:
* SVR for p2020, p2020E
* immap updates for LAWs and DDR on p2020
* LAW defines related to p2020
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Provide a helper function that will setup the last available
LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
LAWs have the concept of priority so its useful to be able to allocate
the lowest (highest number) priority. We will end up using this with the
new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.
In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.
Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Move the initialization of the LAWs into C code and provide an API
to allow modification of LAWs after init.
Board code is responsible to provide a law_table and num_law_entries.
We should be able to use the same code on 86xx as well.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
