Commit graph

24 commits

Author SHA1 Message Date
Simon Glass
cf92e05c01 Move ALLOC_CACHE_ALIGN_BUFFER() to the new memalign.h header
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-09-11 17:15:20 -04:00
Marek Vasut
a928a36ff9 spi: mxs_spi: Configure chipselect after block reset
The chipselect must be written into the CTRL0 register after the SSP
block is reset, otherwise the block will always use ChipSelect #0.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-08-27 19:39:39 +05:30
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Stefan Roese
0499218dbc imx: Move some header files from arch-mxs to imx-common
The following headers are moved to a i.MX common location:

- regs-common.h
- regs-apbh.h
- regs-bch.h
- regs-gpmi.h
- dma.h

This way this header can be re-used also by other i.MX platforms.
For example the i.MX6 which will need it for the upcoming NAND
support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-22 10:22:22 +02:00
Simon Glass
d3504fee73 spi: Use spi_alloc_slave() in each SPI driver
Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-03-19 08:45:36 -07:00
Marek Vasut
d3f26a2700 mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLE
The CONFIG_MXS_SPI_DMA_ENABLE is no longer relevant as the SPI DMA
has proven to work correctly. Remove this configuration option.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-03-07 17:22:56 +01:00
Marek Vasut
c96e78ccfe mxs: spi: Fix the MXS SPI for mx23
The MX23 has slightly different register layout. Adjust the SPI
driver to match the layout, both the PIO and DMA part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-03-07 17:22:56 +01:00
Marek Vasut
3430e0bd2a mxs: mmc: spi: dma: Better wrap the MXS differences
This patch streamlines the differences between the MX23 and MX28 by
implementing a few helper functions to handle different DMA channel
mapping, different clock domain for SSP block and fixes a few minor
bugs.

First of all, the DMA channel mapping is now fixed in dma.h by defining
the actual channel map for both MX23 and MX28. Thus, MX23 now does no
longer use MX28 channel map which was wrong. Also, there is a fix for
MX28 DMA channel map, where the last four channels were incorrect.

Next, because correct DMA channel map is in place, the mxs_dma_init_channel()
call now bases the channel ID starting from SSP port #0. This removes the
need for DMA channel offset being added and cleans up the code. For the
same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus
no need to adjust dma channel number in the driver either.

Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus()
which handles the fact that MX23 has shared SSP clock for both ports, while
MX28 has per-port SSP clock.

Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the
same functionality from MMC and SPI driver into common code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-03-07 17:22:56 +01:00
Otavio Salvador
bf48fcb61b mxs: clock: Use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Marek Vasut
14e26bcfa7 mxs: ssp: Pull out the SSP bus to regs conversion
Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:19 +01:00
Marek Vasut
e9f7eafd3c MX28: SPI: Fix the DMA chaining
It turns out that in order for the SPI DMA to properly support
continuous transfers longer than 65280 bytes, there are some very
important parts that were left out from the documentation.

Firstly, the XFER_SIZE register is not written with the whole length
of a transfer, but is written by each and every chained descriptor
with the length of the descriptors data buffer.

Next, unlike the demo code supplied by FSL, which only writes one PIO
word per descriptor, this does not apply if the descriptors are chained,
since the XFER_SIZE register must be written. Therefore, it is essential
to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are
written with zero, since they don't apply. The DMA programs the PIO words
in an incrementing order, so four PIO words.

Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC
must not be set during the whole transfer, but it must be set only on the
last descriptor in the chain.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-06 14:17:55 +02:00
Marek Vasut
88d1555968 MX28: SPI: Fix the DMA DCache race condition
This patch fixes dcache-related problem. The problem manifested
when dcache was enabled and the following command issued twice:

mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum 0x42000000 0x10000

The SHA1 checksum was correct during the first call. Yet with
every subsequent call of the above command, it differed and was
wrong.

It turns out this was because of a race condition. On the first
time the command was called, no cacheline contained any data from
the destination memory location. The DMA transfered data into the
location and the cache above the location was invalidated. Then the
checksum was computed, but that meant the data were loaded into data
cache.

On any subsequent call, the DMA again transfered data into the same
destination. Yet during the transfer, some of the DCache lines were
evicted and written back into the main memory. Once the DMA transfer
completed, the data cache was invalidated over the memory location as
usual. But the data that were to be loaded back into the data cache
by subsequent SHA1 checksuming were corrupted.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-06 14:17:55 +02:00
Marek Vasut
2c4321444a MX28: SPI: Supercharge the SPI driver
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:29 +02:00
Matt Sealey
c6b52c4927 spi: fix mxs_spi_slave structure allocation to clear memory
Use calloc() instead of malloc() to allocate the mxs_spi_slave structure.
Clearing the memory is necessary since most of the time this gets done
super early in boot, but on warm reboots, and when SPI probing is done
long after the init stages it could actually pick up previously used memory,
and things like the chipselect polarity and other data end up being filled
with trash data if not explicitly set by the board files.

This solves a semi-random, almost unreproducable error whereby SPI devices
act very, very strangly on boot.

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:27 +02:00
Otavio Salvador
fa7a51cb82 mxs: Convert sys_proto.h prefixes to 'mxs'
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:25 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Marek Vasut
7c5e6f7a5d MX28: SPI: Add DMA transfer support
The DMA transfers happen only if the transfered data are larger
than 512 bytes. Otherwise PIO is used. This is a small speed
optimization.

The DMA transfer doesn't work if unaligned transfer is requested
due to the limitation of the DMA controller. This has to be fixed
by introducing generic bounce buffer. Therefore the DMA feature
is now disabled by default.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-09-01 14:58:16 +02:00
Marek Vasut
ccd4d5a0d4 MX28: SPI: Pull out the PIO transfer function
Pull out all the PIO transfer logic into separate function,
so DMA can be added.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-09-01 14:58:16 +02:00
Marek Vasut
c7065fa824 MX28: SPI: Refactor spi_xfer a bit
This makes it easier to adapt for addition of DMA support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2012-09-01 14:58:16 +02:00
Fabio Estevam
148ca64f32 spi: mxs: Allow other chip selects to work
MXS SSP controller may have up to three chip selects per port: SS0, SS1 and SS2.

Currently only SS0 is supported in the mxs_spi driver.

Allow all the three chip select to work by selecting the desired one
in bits 20 and 21 of the HW_SSP_CTRL0 register.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-05-15 08:31:35 +02:00
Fabio Estevam
79cb14ab39 spi: mxs: Introduce spi_cs_is_valid()
Introduce spi_cs_is_valid() for validating spi bus and chip select numbers.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-05-15 08:31:35 +02:00
Fabio Estevam
d9fb6a4c7e mxs_spi: Return proper timeout error
Instead of returning -1, it is preferred to return -ETIMEDOUT in case of timeouts.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-03-27 09:41:16 +02:00
Matthias Fuchs
2638b50b18 mx28: fix i.MX28 spi driver
The generic spi flash driver (drivers/mtd/spi/spi_flash.c) uses the
spi low level driver's spi_xfer() function with len=0 to deassert the
SPI flash' chip select. But the i.MX28 spi driver rejects this call
due to len=0.

This patch implements an exception for len=0 with the SPI_XFER_END
flag set. This results in an extra read with the chip select being
deasserted afterwards. There seems to be no way to deassert the signal
by hand.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-12 10:11:27 +01:00
Marek Vasut
ec33de3d12 iMX28: Add SPI driver
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-11-11 11:36:57 +01:00