Commit graph

20415 commits

Author SHA1 Message Date
Pali Rohár
f031f07f3a pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macro
PCI fsl driver uses extended format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
86be29e9d9 pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macro
PCI tegra driver uses extended format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing
PCI_CONF1_ENABLE bit and remove old custom driver address function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
d0dd49f929 pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macro
PCI mvebu driver uses extended format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom
driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
f146bd96e4 pci: msc01: Use PCI_CONF1_ADDRESS() macro
PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
247ffc6b36 pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macro
PCI mpc85xx driver uses extended format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_EXT_ADDRESS().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
2b29d79be8 pci: gt64120: Use PCI_CONF1_ADDRESS() macro
PCI gt64120 driver uses standard format of Config Address for PCI
Configuration Mechanism #1.

So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver
address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
95ab5784bf pci: When disabling pref MEM set all base bits
It is common to set all base address bits to one and all limit address bits
to zero for disabling address forwarding. Forwarding is disabled when base
address is higher than limit address, so this change should not have any
effect.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12 14:21:24 -05:00
Pali Rohár
06f25bd2a9 pci: Disable I/O forwarding during autoconfiguration if unsupported
If U-Boot does not have any I/O resource for assignment then disable I/O
forwarding in PCI bridge autoconfiguration code. Default initial state of
PCI bridge IO registers is unspecified, therefore they can be in enabled if
U-Boot does not touch them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12 14:21:24 -05:00
Pali Rohár
f2094143c5 pci: Fix register for determining type of IO base address
Function dm_pciauto_prescan_setup_bridge() configures base address
registers, therefore it should read type of IO from base address registers
(and not from limit address registers).

Note that base and limit address registers should have same type, so this
change is just usage correction and has no functional change on correctly
working hardware.

Fixes: 8e85f36a8f ("pci: Fix configuring io/memory base and limit registers of PCI bridges")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12 14:21:24 -05:00
Pali Rohár
bf667d5f15 pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12 14:21:24 -05:00
Pali Rohár
3264b6177f pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-12 14:21:24 -05:00
Pali Rohár
fbfa15c0b8 pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2022-01-12 14:21:24 -05:00
John Keeping
66d0b7e1f2 mmc: dwmmc: return a proper error code when busy
When failing to send a command because the hardware is busy, return
EBUSY to indicate the cause instead of just -1.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
b2acee4bb0 mmc: fsl_esdhc_imx: set sysctl register for clock initialization
[ fsl_esdhc commit 263ddfc345 ]

The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
00e0cd7fda mmc: fsl_esdhc_imx: Replace more #ifdefs by if
This builds on the previous patch by converting yet more preprocessor
macros to C ifs. This is split off so that the changes adapted from
Micheal's patch may be clearly distinguished from the ones I have
authored myself.

MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO
needs some -ENOSYS stubs when it isn't defined.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
4f01db814a mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()
[ fsl_esdhc commit 52faec3182 ]

Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
41c6a22fc2 mmc: fsl_esdhc_imx: simplify esdhc_setup_data()
[ fsl_esdhc commit 7e48a028a4 ]

First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
setup code is identical for both directions, except for the data pointer.
Thus, unify them.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
0167267769 mmc: fsl_esdhc_imx: use dma-mapping API
[ fsl_esdhc commit b1ba1460a4 ]

Use the dma_{map,unmap}_single() calls. These will take care of the
flushing and invalidation of caches.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
ed9e9b2213 mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfers
[ fsl_esdhc commit da86e8cfcb ]

SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove unnecessary CONFIG_FSL_LAYERSCAPE.

Also make the error message more concise.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:40 +09:00
Sean Anderson
4ea11bf241 mmc: fsl_esdhc_imx: fix mmc->clock with actual clock
[ fsl_esdhc commit 30f6444d02 ]

Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:39 +09:00
Sean Anderson
d39aa73ca8 mmc: fsl_esdhc_imx: drop redundant code for non-removable feature
[ fsl_esdhc commit commit 08197cb8df ]

Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12 09:56:39 +09:00
Sean Anderson
95d6b74cf8 mmc: fsl_esdhc_imx: clean up bus width configuration code
[ fsl_esdhc commit 07bae1de38 ]

This patch is to clean up bus width setting code.

- For DM_MMC, remove getting "bus-width" from device tree.
  This has been done in mmc_of_parse().

- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
  to fsl_esdhc_initialize() which is non-DM_MMC specific.
  And fix up bus width configuration to support only 1-bit, 4-bit,
  or 8-bit. Keep using 8-bit if it's not set because many platforms
  use driver without providing max bus width.

- Remove bus_width member from fsl_esdhc_priv structure.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[ converted if statement to switch ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:39 +09:00
Sean Anderson
2fd7d1f247 mmc: fsl_esdhc_imx: fix voltage validation
[ fsl_esdhc commit 5b05fc0310 ]

Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:39 +09:00
Sean Anderson
308a4ff77d mmc: fsl_esdhc_imx: remove redundant DM_MMC checking
[ fsl_esdhc commit 2913926f3b ]

Remove redundant DM_MMC checking which is already in DM_MMC conditional
compile block.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 09:56:39 +09:00
Sean Anderson
297d2de2ef mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.

- Drop non-BLK support for DM_MMC introduced by below patch.
   66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled

- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).

- Use DM_MMC instead of BLK for conditional compile.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12 08:22:42 +09:00
Tom Rini
fe04d885fb Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-10 14:01:57 -05:00
Tom Rini
0dadad6d7c - disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
 - add changes to support VIM3/L android boot by using meson64_android.h config
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Merge tag 'u-boot-amlogic-20220107' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs
- meson64_android: add board specific env settings, in order to support VIM3/L for android
- add changes to support VIM3/L android boot by using meson64_android.h config
2022-01-09 07:56:31 -05:00
Gary Bisson
8f758683a8 usb: gadget: dwc2_udc_otg: set ep's desc during enable/disable
Fastboot support has been broken on platforms using dwc2 controller
since the gadget gets its max packet size from it.
This patch is the equivalent of 723fd5668f which fixed the same issue
but for the chipidea controller.

Fixes: 27c9141b11 ("usb: gadget: fastboot: use correct max packet size")

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2022-01-08 11:16:03 -05:00
Marek Vasut
75f080df46 Revert "clk: Detect failure to set defaults"
This reverts commit 92f1e9a4b3.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-07 09:30:45 -05:00
Tom Rini
5fec3c853d Pull request of efi-next
Documentation:
 
 * Add Sunxi board description
 
 UEFI:
 
 * Improvements to U-Boot running on top of UEFI
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Merge tag 'efi-next' of https://source.denx.de/u-boot/custodians/u-boot-efi into next

Pull request of efi-next

Documentation:

* Add Sunxi board description

UEFI:

* Improvements to U-Boot running on top of UEFI
2021-12-31 07:28:36 -05:00
Simon Glass
2996066110 efi: serial: Support arrow keys
At present only the backspace key is supported in U-Boot, when running as
an EFI app. Add support for arrows, home and end as well, to make the CLI
more friendly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-31 06:45:01 +01:00
Tom Rini
87a9aa604d - various fixes to the sandbox display support
- support for showing a logo without splash screen config
 - support for BMP drawing to depths other than 16bpp
 - tests for the different types of supported BMP images
 - support showing a logo when running coreboot via qemu
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Merge tag 'video-next-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video into next

- various fixes to the sandbox display support
- support for showing a logo without splash screen config
- support for BMP drawing to depths other than 16bpp
- tests for the different types of supported BMP images
- support showing a logo when running coreboot via qemu
2021-12-28 11:28:31 -05:00
Tom Rini
b3f84a939f - mxsfb axi/disp_axi clock enable fix
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Merge tag 'video-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video

- mxsfb axi/disp_axi clock enable fix
2021-12-28 11:19:26 -05:00
Tom Rini
880f3ee4f5 Pull request for efi-2022-01-rc4-4
UEFI:
 
 * allow for more than 16 KiB UEFI variable size when using StMM
 
 Others:
 
 * make watchdog sysreset compatible with separate poweroff driver
 * avoid OpenSSL deprecation warnings
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Merge tag 'efi-2022-01-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4-4

UEFI:

* allow for more than 16 KiB UEFI variable size when using StMM

Others:

* make watchdog sysreset compatible with separate poweroff driver
* avoid OpenSSL deprecation warnings
2021-12-28 07:59:56 -05:00
Tom Rini
b2d1c828b9 Convert CONFIG_KIRKWOOD_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_KIRKWOOD_GPIO

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:19 -05:00
Tom Rini
6328f95ea0 serial: arm_dcc: Use CONFIG_ARM64 not CONFIG_CPU_ARMV8
The only place we use CONFIG_CPU_ARMV8 was in the arm_dcc serial driver.
Switch this to CONFIG_ARM64 today, and if in the future we need finer
granularity tuning here, a new CONFIG_SERIAL option needs to be
introduced.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
2f8a6db5d8 Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig
In order to finish moving this symbol to Kconfig for all platforms, we
need to do a few more things.  First, for all platforms that define this
to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to
CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h.  This entails
also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk()
and updating a few preprocessor tests.

With that done, all platforms that define a value here can be converted
to Kconfig, and a fall-back of zero is sufficiently safe to use (and
what is used today in cases where code may or may not have this
available).  Make sure that code which calls this function includes
<clock_legacy.h> to get the prototype.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
068c41f1cc Finish conversion CONFIG_SYS_NAND_SELF_INIT to Kconfig
In order to finish this conversion we need to add a symbols for
SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases
there where we need to, or need to not, use that framework as things
stand.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
bfb5387fe9 Convert CONFIG_TEGRA_NAND to Kconfig
This converts the following to Kconfig:
   CONFIG_TEGRA_NAND

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:18 -05:00
Tom Rini
7856cd5a6d Convert CONFIG_SYS_PCI_64BIT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_PCI_64BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 16:20:17 -05:00
Tom Rini
be7dbb60c5 Convert CONFIG_SYS_IMMR to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_IMMR

We do this by consolidating the SYS_IMMR options we have and providing
defaults.

We also, in the few places where M68K was also sharing code with these
platforms, define it within the file to CONFIG_SYS_MBAR to match usage.
This should be cleaned up longer term.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
954a2f8177 pci: Remove unused FSL_PCI_INIT code
The symbol CONFIG_FSL_PCI_INIT is no longer enabled anywhere, removed
now unused code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
4d69303299 Convert CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT

In order to do this conversion, expose this option to the user and
use "save" not "safe" in the text.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:41:38 -05:00
Tom Rini
98ab831da7 Convert CONFIG_FSL_IFC to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_IFC

This is done via select statements to match previous logic.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
7e6a6fd821 Convert CONFIG_ENV_SPI_BUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_ENV_SPI_BUS
   CONFIG_ENV_SPI_CS
   CONFIG_ENV_SPI_MAX_HZ
   CONFIG_ENV_SPI_MODE

As part of this, we use Kconfig to provide the defaults now that were
done in include/spi_flash.h.  We also in some cases change from using
CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in
use anyhow as ENV was not enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Tom Rini
5fd4a7ed0c Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in Kconfig
This is a "hex" prompt but the default value was given as an int.
Switch the default to hex (0x0) and remove the defconfigs that were
using the default, but as hex before.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27 08:40:33 -05:00
Giulio Benetti
f36b3f8f17 video: mxsfb: fix clk_get_by_name() return value check
If clk_get_by_name() returns 0 it means it executed successfully while now
we consider it as an error. So let's check if return value is negative to
be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-12-27 00:30:37 +01:00
Simon Glass
7a8555d871 video: Show the U-Boot logo by default
Enable this for boards with a display, unless they are using the SPLASH
feature.

This shows a U-Boot logo on boards with a display, which seems like a
useful thing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:33:11 +01:00
Simon Glass
84e63abfff video: Support showing the U-Boot logo
Show the U-Boot logo by default. This is only 7KB in size so seems like
a useful default for boards that enable a display.

If SPLASH_SCREEN is enabled, it is not enabled by default, so as not to
conflict with that feature.

Also disable it for tests, since we don't want to complicate the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:32:46 +01:00
Simon Glass
2c8ee30b97 video: Drop VIDEO_LOGO from cfb_console
This driver is obsolete and only used by nokia_rx51. It should be deleted.
For now, drop the VIDEO_LOGO code to avoid confusion with the new
implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-12-26 23:25:29 +01:00