This work-around has been here in U-Boot because the AIDET and GPIO
drivers were missing in the upstream Linux. Both are now available
in Linus' tree:
- drivers/irqchip/irq-uniphier-aidet.c
- drivers/gpio/gpio-uniphier.c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is now set up by the pinctrl driver when the NAND driver is
probed. Remove the legacy code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure world. It is a maintenance headache to support two different
boot mechanisms. Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32
While fixing those, the type conflict of cci500_init() was found.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.
Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now. This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
There are similar functions that look up SoC data by the SoC ID.
The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to
avoid the code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come to think of it, there is no need for the
conversion in the first place. Using the SoC ID from the register
as-is a straightforward way.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
We may want to run different firmware before running U-Boot. For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader. In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.
This commit removes "select SPL" to make it configurable. This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT. The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint. This will mitigate the per-SoC
(sometimes per-board) defconfig burden.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Initialize SBC and Support Card in U-Boot proper instead of SPL.
We may run different firmware (ex. ARM Trusted Firmware) before
U-Boot, and basic SoC initialization may be done there. In that
case, SPL may not be used.
The motivation for preparing SBC and Support Card in SPL was to use
LED for early debugging, but this is not mandatory to boot SoCs.
With this commit, LED will be unavailable in SPL, but we can use a
debug serial instead. So, this change will not be a big deal.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The code here is cluttered due to the switch statement. Introduce a
table of callbacks to clean up the initialization code across SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
At first, we thought the LD20 PLL setting would be board dependent,
but this argument turned out unneeded after all.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Raise the VDD09 voltage line to 1.0V to suppress VBO noise.
This errata work-around code is needed only for ES1.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
- Initialize PLLs (SPL initializes only DPLL to save the precious
SPL memory footprint)
- Adjust CPLL/MPLL to the final tape-out frequency
- Set the Cortex-A53 clock to the maximum frequency since it is
running at 500MHz (SPLL/4) on startup
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper. Split the common code into pll-base-ld20.c for easier
re-use.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers. Use them by
calling pinctrl_generic_set_state() directly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, the UniPhier platform calls several init functions in the
following order:
[1] spl_board_init()
[2] board_early_init_f()
[3] board_init()
[4] board_early_init_r()
[5] board_late_init()
The serial console is not ready at the point of [2], so we want to
avoid using [2] from the view point of debuggability. Fortunately,
all of the initialization in [2] can be delayed until [3]. I see no
good reason to split into [3] and [4]. So, merge [2] through [4].
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:20 +09:00
Renamed from arch/arm/mach-uniphier/board_early_init_f.c (Browse further)
