Configure the phy regulator if defined by the "phy-supply" DT phandle.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The DT binding says:
- phy-reset-duration : Reset duration in milliseconds. Should present
only if property "phy-reset-gpios" is available. Missing the property
will have the duration be 1 millisecond. Numbers greater than 1000 are
invalid and 1 millisecond will be used instead.
However the current code:
- clamps values greater than 1000ms to 1000ms rather than 1.
- does not initialize the delay if the property does not exist
(else clause mismatch)
- returns an error if phy-reset-gpios is not defined
Fix all this and simplify by using dev_read_u32_default()
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The DT binding says that phy-reset-duration is in ms, but the driver
currently uses udelay().
Switch to mdelay() to fix this.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If the phy reports a valid firmware version and doesn't indicate
a fault, skip loading the firmware. This allows the same image
to be used on boards that have firmware storage and those that do not.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Aquantia phys have firmware that can be loaded automatically
from storage directly attached to the phy or via MDIO commands.
Add support for loading firmware from either a file or a
raw location on an MMC device.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
sunxi_rgb2yuv_coef is readonly and never modified.
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Choose best prescaler to improve PWM resolution. Without this change
driver chooses first prescaler that gives us period value within
range, but it could be not the best one.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Looks like old prescaler was used when configuring PWM, fix it.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Fix off-by-one that prevented PWM driver to use prescaler bypass.
Without this change prescaler is always enabled.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently in pmecc_get_sigma(), the code tries to clear the memory
pointed by smu with wrong size 'sizeof(int16_t) * ARRAY_SIZE(smu)'.
Since smu is actually a pointer, not an array, so ARRAY_SIZE(smu)
does not generate correct size to be cleared.
In fact, GCC 8.1.0 reports a warning against it:
error: division 'sizeof (int16_t * {aka short int *}) / sizeof (int16_t
{aka short int})' does not compute the number of array elements
[-Werror=sizeof-pointer-div]
Fix it by using the correct size.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
When CONIFG_CLK is enabled, use uclass clk api to handle
the clock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Add CONFIG_ARCH_IMX8 to use the 64bits support in usdhc driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Modify most APIs to use udevice as the first parameter, then
it will be easy to get the clk reference by using udevice pointer.
Use uclass api to get lpuart clk when CONFIG_CLK is enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Enable the RX and TX FIFO in LPUART driver to avoid the input lost
during U-Boot boot up.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add i.MX8 compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.
Also, according to RM, the Receive FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08
(not 0x40) for i.MX8, otherwise the Receive FIFO is not disabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
need to add power domain trees with property "compatible = "nxp,imx8-pd";"
When power on a PD device, the driver will power on its ancestor PD
devices in power domain tree.
When power off a PD device, the driver will check its child PD devices
first. Only if all child PD devices are off, then power off the current PD
device. Then the driver checks sibling PD devices. If sibling PD devices
are off, then it will power off parent PD device.
There is no counter maintained in this driver, but a state to hold current
on/off state. So the request and free functions are empty.
The power domain implementation in i.MX8 DTB set the "#power-domain-cells"
to 0, so there is no ID binding with each PD device. We don't use "id"
variable in struct power_domain. At the same time, we have to set of_xlate
to empty to bypass standard of_xlate in uclass driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add pinctrl driver for i.MX8. The pads configuration is controlled
by SCU, so need to ask SCU to configure pads through scfw API.
Add pinctrl-scu to invoke sc_pad_set to configure pads.
Add a new flag IMX8_USE_SCU to differentiate i.MX8 from other platforms
which could directly configure pads from Acore side.
Add CONFIG_PINCTRL_IMX8 as the built gate.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add clk/misc/pad/pm/rm scfw api implementaion for different
drivers to invoke. The low level code is using misc_call
to invoke imx8_scu driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add i.MX8 MISC driver to handle the communication between
A35 Core and SCU.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
So far the TSC timer driver supports trying hardware calibration first
and using device tree as last resort for its running frequency as the
normal timer.
However when it is used as the early timer, it only supports hardware
calibration and if it fails, the driver just panics. This introduces
a new config option to specify the early timer frequency in MHz and
it should be equal to the value described in the device tree.
Without this patch, the travis-ci testing on QEMU x86_64 target fails
each time after it finishes the 'bootefi selftest' as the test.py see
an error was emitted on the console like this:
TSC frequency is ZERO
resetting ...
### ERROR ### Please RESET the board ###
It's strange that this error is consistently seen on the travis-ci
machine, but only occasionally seen on my local machine (maybe 1 out
of 10). Since QEMU x86_64 target enables BOOTSTAGE support which uses
early timer, with this fix it should work without any failure.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In initr_bootstage() we call bootstage_mark_name() which ends up calling
timer_get_us(). This call happens before initr_dm(), which inits driver
model.
On x86 we set gd->timer to NULL in the transition from board_init_f()
to board_init_r(). See board_init_f_r() for this assignment. So U-Boot
knows there is no timer available in the period immediately after
relocation.
On x86 the timer_get_us() call is implemented as calls to get_ticks() and
get_tbclk(). Both of these call dm_timer_init() to set up the timer, if
gd->timer is NULL and the early timer is not available.
However dm_timer_init() cannot succeed before initr_dm() is called.
So it seems that on x86 if we want to use CONFIG_BOOTSTAGE we must enable
CONFIG_TIMER_EARLY. Update the Kconfig to handle this.
Note: On most architectures we can rely on the pre-relocation memory still
being available, so that gd->timer pointers to a valid timer device and
everything works correctly. Admittedly this is not strictly correct since
the timer device is set up by pre-relocation U-Boot, but normally this is
fine. On x86 the 'CAR' (cache-as-RAM) memory used by pre-relocation U-Boot
disappears in board_init_f_r() and any attempt to access it will hang.
This is the reason why we must mark the timer as invalid when we get to
board_init_f_r().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The PCI controller can have DT subnodes describing extra properties
of particular PCI devices, ie. a PHY attached to an EHCI controller
on a PCI bus. This patch parses those DT subnodes and assigns a node
to the PCI device instance, so that the driver can extract details
from that node and ie. configure the PHY using the PHY subsystem.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This converts the following to Kconfig:
CONFIG_FLASH_CFI_DRIVER
CONFIG_SYS_FLASH_USE_BUFFER_WRITE
CONFIG_FLASH_CFI_MTD
CONFIG_SYS_FLASH_PROTECTION
CONFIG_SYS_FLASH_CFI
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-migrate]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add new Kconfig option, SYS_BOOTCOUNT_MAGIC, to select the boot
counter magic word. This can be useful ie. in case the entire
boot counter register is not usable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Xilinx SoC Versal is using fixed clock where setting rate is not supported.
That's why workaround the driver till real clock driver is supported.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heterogeneous acceleration for any application. The Versal AI
Core series has five devices, offering 128 to 400 AI Engines. The series
includes dual-core Arm Cortex™-A72 application processors, dual-core Arm
Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more
than 1,900 DSP engines optimized for high-precision floating point with
low latency.
The patch is adding necessary infrastructure in place without enabling
platform which is done in separate patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
We need to #ifdef some variables to avoid warning about them being
unused.
Fixes: 1a048cd656 ("driver: net: fsl-mc: Add support of multiple phys for dpmac")
Signed-off-by: Tom Rini <trini@konsulko.com>
NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has
manufacturer id as 0x2C, which are rather for newer flashes
after the split of Micron from ST.
So macro for this micron manufacturer id.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: updated commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
accidentially while fixing merge errors for patch:
https://lists.denx.de/pipermail/u-boot/2018-September/342278.html
missed to add files:
MAINTAINERS
drivers/i2c/Kconfig
drivers/i2c/Makefile
add them with this patch.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Till now we have had cases where we had one phy device per dpmac.
Now, with the upcoming products (LX2160AQDS), we have cases, where there
are sometimes two phy devices for one dpmac. One phy for TX lanes and
one phy for RX lanes. to handle such cases, add the support for multiple
phys in ethernet driver. The ethernet link is up if all the phy devices
connected to one dpmac report link up. also the link capabilities are
limited by the weakest phy device.
i.e. say if there are two phys for one dpmac. one operates at 10G without
autoneg and other operate at 1G with autoneg. Then the ethernet interface
will operate at 1G without autoneg.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The dpmac initalization should not depend on phy.
As the phy is not necessary to be present for dpmac to function.
Therefore, remove dpmac initialization dependency from phy.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
when there is no phy present for a dpmac, a dummy phy device is created.
when we move to multiple phy method, we need to create as many dummy phy
devices.
Change this method so that we don't need to create dummy phy devices.
We always report linkup if no phy is present.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
if an error occurs during init_phy, we should free the phydev structure
which has been allocated by phy_connect.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The phydev structure is present in both ldpaa_eth_priv and
wriop_dpmac_info. the phydev in wriop_dpmac_info is not being used
As the phydev is created based on phy_addr and bus members of
wriop_dpmac_info, it is appropriate to keep phydev in wriop_dpmac_info.
Also phy_regs is not being used, therefore remove it
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Sandbox SPL/TPL support
Various dm-related improvements
-----BEGIN PGP SIGNATURE-----
iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAlu9RL4RHHNqZ0BjaHJv
bWl1bS5vcmcACgkQfxc6PpAIreYd8gf+NYAGhpiEZZ5vc3DB4Xdn2okgakbbg0QQ
/b0Lr9xQsKgZthK0rvPlH2dXxf+ViAm1iHTy8KBCFi0SHNder48Zui9uTrX0NRq8
pLZGyJPXPYbiyc4pQTEJpTth4iShcphRVio0no4sLpNQqO4aQrialSLa9fnwd9Ra
1l9mF91aaYw6cG+/ejg3UR1LfsDdQ5bjubt0Fw0wGX9UvQOAz5gz5+a17wrz6+Gx
L0gzvyfbuLUhbWB36DXikrL14DAFys2uV9aHJ5zEd53l+F7ZHWsupCO0OtN66cV7
KpPKoYG7vhLqBXKpyrW20T+BPeSyDKmDQE6wbpECmEDOvKzvW67O/w==
=Bfjm
-----END PGP SIGNATURE-----
Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dm
Test improvements to tidy up output and drop duplicate tests
Sandbox SPL/TPL support
Various dm-related improvements
Push generic defines of gpio.h out of mach-davinci to drivers/gpio
now that non-davinci architectures are beginning to use this IP.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix calimain build]
Signed-off-by: Tom Rini <trini@konsulko.com>
The goto label name is misspelled it should be DPMAC not DPAMC
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The target will respond to pings while doing other network handling.
Make sure that the response happens and is correct.
This currently corrupts the ongoing operation of the device if it
happens to be awaiting an ARP reply of its own to whatever serverip it
is attempting to communicate with. In the test, add an expectation that
the user operation (ping, in this case) will fail. A later patch will
address this problem.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This tests that ARP requests made to this target's IP address are
responded-to by the target when it is doing other networking operations.
This currently corrupts the ongoing operation of the device if it
happens to be awaiting an ARP reply of its own to whatever serverip it
is attempting to communicate with. In the test, add an expectation that
the user operation (ping, in this case) will fail. A later patch will
address this problem.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tests need to be able to pass their "unit test state" to the handlers
where asserts are evaluated. Add a function that allows the tests to set
this private data on the sandbox eth device.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use up to the max allocated receive buffers so as to be able to test
more complex situations.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If tests want to implement tx handlers, they will likely need access to
the details in the priv structure.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make the send handler registerable so tests can check for different
things.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Store the per-device data with the device.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.
Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.
Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.
To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).
To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.
Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"
https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954
Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.
Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.
One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).
Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.
Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
There are plenty of existing drivers that have macros like ETH_ALEN
defined in their own source files. Now that we imported the kernel's
if_ether.h to U-Boot we can reduce some duplication.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Davanci spi driver has DM support already, this patch
add support for platdata so-that SPL can use it for
low foot-print.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com>
Some boards (like omap3_logic) hang when trying to access
address 0. This happens when executing the new 'mtd list' command.
This patch enhances the checks for conditions that would
preclude mtd_probe_devices() from operating.
Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Currently there are two ethernet drivers (mvneta.c and mvpp2.c) that
has netdev_### (eg: netdev_dbg) log macros defined in its own driver
file. This adds these log macros in a common place linux/compat.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The internal DMAC on Gen3 is 32bit only, limit the DMA address
range to 32bit.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Pass the entire source data pointer to tmio_sd_addr_is_dmaable()
so we don't have to apply casts throughout the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
At present this function uses pixels but it seems more useful for it to
position in terms of characters on the screen. This also matches the
comment to the function. Update this.
Unfortunately there is one user of this function (at91). Have a crack at
fixing this, since I cannot test it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
We have a method to return the last reset as a string for humans, but not
a method that allows it to be used programmatically. Add a new method that
returns the last reset as an enum.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present ctags emits lines with unmatched quotes which means that the
output file is invalid. This is with exuberant-ctags version 5.9~svn201103
but I also see it with plain ctags. I am not sure that it is a bug though.
Make a few minor changes in the source code to fix this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the panel can be turned on but not off, and the brightness
cannot be controlled at run-time. Add a new API function to both the panel
and backlight uclasses to handle this. Enhance the PWM backlight driver
to deal with custom levels properly and allow the backlight to be turned
on and off.
Update the test to cover thes new features.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this uclass has no tests. Add a simple one which checks the PWM
configuration, regulator and GPIO.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present version 3 messages are only supported on SPI. Add support for
using LPC as well, as used on samus.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file has changed quite a bit in the last 5 years as the capabilities
of the ECs have grown. Sync it up with the copy in coreboot commit
b9141f2215.
The only change is the addition of EC_VBNV_BLOCK_SIZE_V2. This is needed
because U-Boot uses the new v2 vboot API and this is not currently fully
supported by Chromium OS firmware.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust the TPM drivers to use livetree (only one does not). Also,
sometimes TPMs can have child devices if they provide a service to the
system (such as storing secure data), so permit that.
Signed-off-by: Simon Glass <sjg@chromium.org>
All driver-model operation should return an error code. Adjust this
function to do so also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
When SPI flash operations fail it is helpful to be able to see the error
codes and where they are generated. Add logging to capture this
information for read operations.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we pass around a private pointer to specify the cros_ec device.
With driver model it makes more sense to pass the device. Update the code
to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this option applies to SPL, but it should be available in TPL
also, and separately. Change to using CONFIG_IS_ENABLED(), add a new
Kconfig option and fix up hang().
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to specify that a node should be used before
relocation (in U-Boot proper) without it also ending up in SPL and TPL
device trees. Add a new "u-boot,dm-pre-proper" boolean property for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add Kconfig options so that the RTC can be used in SPL and TPL. This is
helpful for accessing the contents of CMOS RAM, for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to enable/disable block drivers in TPL. This
is needed to provide sandbox support. Add a Kconfig option and adjust the
Makefile.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is necessary to read the keyboard in early phases of
U-Boot. Update the config to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present spi_flash_cmd_read_ops() allocates and frees a few bytes of
memory every time it is called. It is faster to use the stack for this
and this is now supported by the minimum GCC version required by U-Boot.
Remove the allocation and use a variable-sized array instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present ofnode_read_fmap_entry() reads a flash map entry in a format
which is not supported by binman. To allow use to use binman-format
descriptions, update this function.
Also add a simple test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some devices have children and want to press an existing inactive child
into service when needed. Add a function to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Quite a few functions do not actually modify the device that is passed in.
Update the function signatures to reflect that.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no reason why this feature should not be supported for uclass-
private data. Update the code accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox sets non-blocking I/O as soon as any input is read
from the terminal. However it does not restore the previous state on
exit. Fix this and drop the old os_read_no_block() function.
This means that we always enable blocking I/O in sandbox (if input is a
terminal) whereas previously it would only happen on the first call to
tstc() or getc(). However, the difference is likely not important.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we don't have to deal with the command-line flag we can simplify
the code for detecting the emulator. Remove the lookup based on the SPI
specification, relying just on the device tree to locate the emulator.
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver was originally written against Chromium OS circa 2012. A few
new features have been added. Enhance the TPM driver to match. This mostly
includes a few new messages and properly modelling whether a particular
'space' is present or not.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use an enum for command values instead of open-coding them. This removes
the need for comments. Also make sure the driver returns proper error
numbers instead of -1.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox assumes that device-tree control is active, but this
may not be the case in SPL or TPL. Add some conditions to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are many situations where sandbox syncs the display to
the SDL frame buffer. This is a very expensive operation but is only
needed every now and then. Update video_sync() so that we can specify
whether this operation is really needed.
At present this flag is not used on other architectures. It could also
be used for reducing writeback-cache flushes but the benefit of that would
need to be investigated.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Add logging to aid debugging features in these drivers. Also drop some
code in sandbox_spi_xfer() which is not used.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we support specifying SPI flash devices to use in the device
tree and on the command line. Drop the second option, since it is a pain
to support nicely with driver model, and unnecessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
This can be used for device register access from board code.
This allows access to capabilities in the RTC chip not abstracted in
U-Boot's RTC class. E.g., device NVRAM or a tamper detection circuit.
Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Of CONFIG_OF_TRANSLATE is enabled, this function still returns
untranslated bogus results. Add the missing translation.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The size should be decoded using of_n_size_cells(), make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enables cmd_avb and its dependencies need to run the AVB tests.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>
Adds a sandbox tee driver which emulates a generic TEE with the OP-TEE
AVB TA.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix printf warnings in ta_avb_invoke_func, slots is uint]
Signed-off-by: Tom Rini <trini@konsulko.com>
Adds configuration option OPTEE_TA_AVB and a header file describing the
interface to the Android Verified Boot 2.0 (AVB) trusted application
provided by OP-TEE.
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds support in optee supplicant to route signed (MACed) RPMB frames
from OP-TEE Secure OS to MMC and vice versa to manipulate the RPMB
partition.
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds a OP-TEE driver.
* Targets ARM and ARM64
* Supports using any U-Boot memory as shared memory
* Probes OP-TEE version using SMCs
* Uses OPTEE message protocol version 2 to communicate with secure world
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds a uclass to interface with a TEE (Trusted Execution Environment).
A TEE driver is a driver that interfaces with a trusted OS running in
some secure environment, for example, TrustZone on ARM cpus, or a
separate secure co-processor etc.
The TEE subsystem can serve a TEE driver for a Global Platform compliant
TEE, but it's not limited to only Global Platform TEEs.
The over all design is based on the TEE subsystem in the Linux kernel,
tailored for U-Boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds mmc_rpmb_route_frames() to route RPMB data frames from/to an
external entity.
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Just as /chosen may contain devices /firmware may contain devices, scan
for devices under /firmware too.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Add support for the Arm Versatile Express config bus that is
being used for exposing various subsystems via a generic
configuration bus. This driver adds support for generating
transactions on this configuration bus and can be used by
other drivers to abstract the communication with the actual
function providers.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
- fixes to rkimage for SPL boot via USB
- fixes to make_fit_atf.py, incl. entry-point calculation and python3
compatibility
- OP-TEE support for ARMv7-based SoCs
- fixes to RGMII/GMII selection on the RK3328
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJbt0FOAAoJECaAFcEOcohNZmcH/A1mKO0/R4tHCqFP2j0I+OuP
PClkA1HUZuD5phvPMaxdHQBwsq7sAa8AljK1oPCNkslP7mFxToUUBx7xc0vB89P/
D+XsI4uce89hIyTULR2FdhR22MOk41zaLVeNicpQ1keCNbzCwsHsHTA+B4XN/xNe
tdPpu6wN2D+g88DAv+/ebVYgjmxRvFD4qpL9bbZpOqqA8XCcD31ukCR2E4fsESgn
mzwKaKcX6SeYgTVCT8Q15SLTNI1WRUY1Y1laj1WKl4abY+HsTt4Whm9imM2l3K5W
ODj6vnFlwEC9rgdxmtXGcmBfwtyXubSfuZDrMGFAiOlyIUgpPXWZI7i8LYQbZ7s=
=NdBl
-----END PGP SIGNATURE-----
Merge tag 'rockchip-for-v2018.11-rc2' of git://git.denx.de/u-boot-rockchip
Rockchip-focused changes for v2018.11-rc2:
- fixes to rkimage for SPL boot via USB
- fixes to make_fit_atf.py, incl. entry-point calculation and python3
compatibility
- OP-TEE support for ARMv7-based SoCs
- fixes to RGMII/GMII selection on the RK3328
Signed-off-by: Tom Rini <trini@konsulko.com>
Using PHY internal delays in combination with the phy-mode
rgmii-id/rxid/txid was not possible. Only rgmii was supported.
Now we can disable rockchip's gmac delay lines and also use
rgmii-id/rxid/txid.
Based on commit eaf70ad14cbb ("net: stmmac: dwmac-rk: Add
handling for RGMII_ID/RXID/TXID") for mainline linux kernel.
Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
We have to use RK3328_RXCLK_DLY_ENA_GMAC_ENABLE instead of
RK3328_RXCLK_DLY_ENA_GMAC_MASK in rk3328_gmac_set_to_rgmii()
to enable the RX delay.
The MASK was used in a wrong way.
Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Reviewed-by: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds the SPI driver for the MediaTek MT7688 SoC (and
derivates). Its been tested on the LinkIt Smart 7688 and the Gardena
Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart
Gateway additionally with an SPI NAND on CS1.
Note that the SPI controller only supports a max transfer size of 32
bytes. This driver implementes a workaround to enable bigger xfer
sizes to speed up the transfer especially for the SPI NAND support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Piotr Dymacz <pepe2k@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
device is supported.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Jagan Teki <jagan@openedev.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.
This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Change to use managed resource function devm_kcalloc(),
so it will auto free memory when driver is removed.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add a PHY driver for the R-Car Gen3 which allows configuring
USB OTG PHY on Gen3 into host mode and toggles VBUS in case a
dedicated regulator is present.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The Arm Versatile Express I2C controller is a simple register-based
controller that uses a register to control the state of the SCL and
SDA lines. Add support for it.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This is the PR for SPI-NAND changes along with few spi changes.
[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add DM support to the SH QSPI driver while retaining non-DM support.
The later is required as this driver is used in SPL which has a size
limitation of 16 kiB.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
[jagan: use proper commit head]
Reviewed-by: Jagan Teki <jagan@openedev.com>
Convert fsl_qspi.c to complete DM mode.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Tested-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Tested-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Add code to reset all reset signals as in SPI DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Release reset when _remove().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
There should not be a 'nand' command, a 'sf' command and certainly not
a new 'spi-nand' command. Write a 'mtd' command instead to manage all
MTD devices/partitions at once. This should be the preferred way to
access any MTD device.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Instead of collecting partitions in a flat list, create a hierarchy
within the mtd_info structure: use a partitions list to keep track of
the partitions of an MTD device (which might be itself a partition of
another MTD device), a pointer to the parent device (NULL when the MTD
device is the root one, not a partition).
By also saving directly in mtd_info the offset of the partition, we
can get rid of the mtd_part structure.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Using an MTD device (resp. partition) name in mtdparts is simple and
straightforward. However, for a long time already, another name was
given in mtdparts to indicate a device (resp. partition) so the
"mtdids" environment variable was created to do the match.
Let's create a function that, from an MTD device (resp. partition)
name, search for the equivalent name in the "mtdparts" environment
variable thanks to the "mtdids" string.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
The current parser is very specific to U-Boot mtdparts implementation.
It does not use MTD structures like mtd_info and mtd_partition. Copy
and adapt the current parser in drivers/mtd/mtd-uclass.c (to not break
the current use of mtdparts.c itself) and write some kind of a wrapper
around the current implementation to allow other commands to benefit
from this parsing in a user-friendly way.
This new function will allocate an mtd_partition array for each
successful call. This array must be freed after use by the caller.
The given 'mtdparts' buffer pointer will be moved forward to the next
MTD device (if any, it will point towards a '\0' character otherwise).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
The user might want to trigger the probe of any MTD device, export these
functions so they can be called from a command source file.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
The rk3188 works nicely with the rockchip mmc driver, so we just need
to add the different compatible for it - as used in the Linux kernel.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
While trying to enable the dw_mmc on rk3188 I managed to confuse
and hang the dw_mmc controller into not delivering further data.
The fifo state never became ready and the driver was iterating in
the while loop reading 0-byte packets forever.
So inspired by how other implementations handle this, check the fifo-
state beforhand and add a timeout to catch any glaring fifo issues
without hanging uboot altogether.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
MSM uses the chipidea controller IP, however it requires
to reinit the phy after controller reset. in EHCI mode there's a
dedicated callback for it.
In device mode however there's no such callback.
Add implementaion of ci_init_after_reset() to implement the above
requirement in case CI_UDC driver is used.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
MSM variant of Chipidea must reinitalize the phy
after controller reset.
Introduce ci_init_after_reset() weak function that
can be used to achieve the above init.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Add a PHY driver for the Qualcomm dragonboard 410c which
allows switching on/off and resetting the phy connected
to the EHCI controllers and USBHS controller.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
platdata_auto_alloc_size was not initialized in structure.
Caused null pointer dereference when configuring device as
gadget.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Since commit 7b3b74d321 ("serial: serial_stm32: Enable overrun")
on STM32F7xx based boards, the first lines of serial output are
missing during boot (we no more see the U-Boot release version,
board model and DRAM size).
By enabling the uart FIFO on STM32F7, the complete U-boot log
can be sent correctly.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
