Commit graph

82201 commits

Author SHA1 Message Date
Patrice Chotard
762d410e0d configs: increase SYS_MALLOC_F_LEN for STM32 MCU's board
Some STM32 MCU's board need their SYS_MALLOC_F_LEN value enlarged
to avoid the "alloc space exhausted" error message during their boot
process.
Use the default SYS_MALLOC_F_LEN value which is set to 0x2000 in
Kconfig.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-27 10:41:02 +02:00
Tom Rini
55ccdee315 Xilinx changes for v2023.01-rc1 (round 2)
xilinx:
 - Add support for new Versal NET SOC
 
 zynqmp:
 - Use mdio bus for ethernet phy description
 - Wire ethernet phy reset via i2c-gpio
 
 versal:
 - Config cleanup
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Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.01-rc1 (round 2)

xilinx:
- Add support for new Versal NET SOC

zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio

versal:
- Config cleanup
2022-09-26 11:28:14 -04:00
Tom Rini
ffa2c88bcf Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next 2022-09-26 11:27:30 -04:00
Patrice Chotard
2b5dee9485 configs: stm32f746-disco: Remove CONFIG_SYS_UBOOT_START flag
By pressing "c" key during SPL execution, we force U-boot execution
instead of a kernel XIP image.

This fixes a hard fault when booting stm32f746-disco in SPL with "c"
key pressed during SPL execution.

U-Boot SPL 2022.10-rc5-00009-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200)
Trying to boot from XIP
Hard fault
pc : 080083fc    lr : 08000d1b    xPSR : 21000000
r12 : 2004f108   r3 : 080083fd    r2 : 00000028
r1 : 2004f0c8    r0 : 2004f0e4
Resetting CPU ...

This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct.
If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE
which match with our requirement.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:21:09 +02:00
Patrice Chotard
3cc471d30a configs: stm32f769-disco: Fix internal flash size
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
STM32F746. The flash layout is quite similar between the 2 SoCs :

	STM32F746 			STM32F769
4 *  32KB sectors 			4 *  32KB sectors
1 * 128KB sector 			1 * 128KB sector
3 * 256KB sectors			7 * 256KB sectors

Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:21:02 +02:00
Patrice Chotard
ab5c4e5b0f configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
4b2bcca5c3 configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
4f174e6ffa configs: stm32746g-eval: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.

Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
c8b577ce82 configs: stm32f769-disco: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.

Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
6ee64732b1 configs: stm32f746-disco: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.

Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
2022-09-26 17:03:06 +02:00
Patrice Chotard
9f603e2fff ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
Device tree alignment with kernel v6.0-rc4.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-09-26 15:19:57 +02:00
Tom Rini
f117c54cc8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- gpio: turris_omnia_mcu: Fix registering gpios (Pali)
2022-09-26 08:30:17 -04:00
Tom Rini
d9993452cb Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- DWC2 gadget EP fix, nuvoton NPCM7xx ehci/ohci driver
2022-09-26 08:29:42 -04:00
Michal Simek
f2641f066b arm64: versal-net: Add support for mini configuration
Versal NET mini configuration is designed for running memory test. Current
output is on DCC but changing serial0 alias to pl011 will move console to
serial port.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aec3f41a4cc48c45b8f07dd6e423d5838dbcc9d7.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:30 +02:00
Michal Simek
ce40cbdf1f arm64: versal-net: Add defconfig for Versal NET
Use one defconfig for supporting multiple different platforms. DTB
reselection is enabled to choose DT based on SOC detection.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/82cc7c1ca8850270cc2ebc992d835a37aa3d236f.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
a41c33992a reset: zynqmp: Enable reset driver for Versal NET
Enable zynqmp reset driver for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8c26618f87d8451c6ffa9487809a24718bff6a7.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
b6b2ad1cea mailbox: zynqmp: Enable ipi mailbox driver for Versal NET
Enable mailbox configs for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3a9a6a58b74d17e2ec5f60617fa42062fbab951.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
2a00cef820 firmware: zynqmp: Add Versal NET compatible string
Add compatible string for Versal NET.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ec73f786e1c89094752ff3693f6f0fb4536c85c5.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Jay Buddhabhatti
ff33227819 clk: versal: Enable clock driver for Versal NET
Add support for Versal NET compatible string in clock driver.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20a35d0c1ffcc222fbe93dd406cdd0aff92f5223.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
2389647225 spi: zynqmp_gqspi: Add support for Versal NET
Add support for Versal NET platform.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f374e9a81f2d85de1240029f3ba5f6423cfa0680.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
1e681448a3 spi: cadence_qspi: Add support for Versal NET platform
Trivial changes to support cadence ospi driver for Versal NET platform.
Also avoid ospi flash reset for now.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Michal Simek
f6aebdf676 arm64: versal-net: Add support for Versal NET platform
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com
2022-09-26 14:23:29 +02:00
Pali Rohár
54bcd84adf gpio: turris_omnia_mcu: Fix registering gpios
Currently all GPIOs supported by CMD_EXT_CONTROL/CMD_GET_EXT_CONTROL_STATUS
commands (last 16 GPIOs) are available only when FEAT_PERIPH_MCU feature
bit is set. So do not register these GPIOs by U-Boot driver when this
feature bit is not set, so U-Boot 'gpio' command would see only GPIOs which
really exists.

Fixes: 5e4d24ccc1 ("gpio: Add Turris Omnia MCU driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-09-26 10:04:37 +02:00
Rick Chen
3c1ec13317 riscv: ae350: Disable AVAILABLE_HARTS
Disable AVAILABLE_HARTS mechanism to make sure that all harts
can boot to Kernel shell successfully.

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-26 14:29:44 +08:00
Rick Chen
e0465f80bd riscv: Introduce AVAILABLE_HARTS
In SMP all harts will register themself in available_hart
during start up. Then main hart will send IPI to other harts
according to this variables. But this mechanism may not
guarantee that all other harts can jump to next stage.

When main hart is sending IPI to other hart according to
available_harts, but other harts maybe still not finish the
registration. Then the SMP booting will miss some harts finally.
So let it become an option and it will be enabled by default.

Please refer to the discussion:
https://www.mail-archive.com/u-boot@lists.denx.de/msg449997.html

Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-26 14:29:13 +08:00
Nikita Shubin
c2bdf02c9d spl: introduce SPL_XIP to config
U-Boot and SPL don't necessary share the same location, so we might end
with U-Boot SPL in read-only memory (XIP) and U-Boot in read-write memory.

In case of non XIP boot mode, we rely on such variables as "hart_lottery"
and "available_harts_lock" which we use as atomics.

The problem is that CONFIG_XIP also propagate to main U-Boot, not only SPL,
so we need CONFIG_SPL_XIP to distinguish SPL XIP from other XIP modes.

This adds an option special for SPL to behave it in XIP manner and we don't
use hart_lottery and available_harts_lock, during start proccess.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2022-09-26 14:28:43 +08:00
Alison Huffman
206af3dec0 Fix out of bound access of ep array.
When processing USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE, and
USB_REQ_GET_STATUS packets in dwc2_ep0_setup an out of bounds access
can occur. This is caused by the wIndex field of the usb control packet
being used as an index into an array whose size is DWC2_MAX_ENDPOINTS (4).

Signed-off-by: Alison Huffman <alisn@google.com>
2022-09-26 01:49:36 +02:00
Jim Liu
693765a720 usb: host: nuvoton: Add nuvoton NPCM7xx ehci/ohci driver
Add nuvoton BMC NPCM750 ehci/ohci driver

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-09-26 01:49:36 +02:00
Tom Rini
9114b7cee8 sandbox SCSI conversion to driver model
final patch for blk improvements
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Merge tag 'dm-next-25sep22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next

sandbox SCSI conversion to driver model
final patch for blk improvements
2022-09-25 17:20:11 -04:00
Simon Glass
22c80d5603 sandbox: Add a test for SCSI
Add a simple uclass test for SCSI. It reads the partition table from a
disk image and checks that it looks correct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:56 -06:00
Simon Glass
46df024394 sandbox: Convert to use driver model for SCSI
At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.

Also drop the SATA command, which does not work with driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:50 -06:00
Simon Glass
02cea1145a sandbox: scsi: Move request-handling code to scsi_emul
Move this code into the emulator file so it can be used by multiple
drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:38 -06:00
Simon Glass
5eff9d9c36 sandbox: Enable SCSI for all builds
This will be needed to run unit tests, once the SCSI code is used for USB
as well. Enable it for all sandbox builds.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 13:59:22 -06:00
Simon Glass
1ac42900d8 sandbox: scsi: Move structs to header file
Move these to the SCSI header file so we can access them from multiple
emulators.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
e074df4d23 sandbox: scsi: Remove setup calls from handle_read()
Move the device-specific code out into the top-level function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
f75b6f76a4 sandbox: scsi: Move reply setup out of helper
Move this code out of the helper function so we can (later) add it as part
of the shared emulation code. Set a default value of 0 for buff_used since
that is what we use when there is an error.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
f148ad1b5f sandbox: scsi: Move file size into shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
a3718f1e53 sandbox: scsi: Move block size into shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
0c12d9dd23 scsi: Move vendor/product info into the shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
fc7a7ed3a6 sandbox: Move buffer to scsi_emul_info
Move the buffer into this struct so it can be shared between different
implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
1377d448a2 scsi: Move core emulation state into a new struct
In preparation for sharing the emulation code between two drivers, move
some of the fields into a new struct. Use a separate header file so it
can be used by various drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
0e0b9e9459 scsi: Move cmd_phase enum to the header
This can be used by common files, so move it to the SCSI header and rename
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
8bae79744b sandbox: usb: Rename transfer_len in protocol struct
This has the same name as a field in our local private struct, which is
confusing. Change the name to xfer_len instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
a966fa98b5 scsi: Tidy up comments for struct scsi_cmd
These comments are bit of a mess. Tidy them up to match the correct coding
style.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Simon Glass
8149b1500d blk: Rename if_type to uclass_id
Use the word 'uclass' instead of 'if_type' to complete the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Heinrich Schuchardt
a2a9317cbc sandbox: unblock signal before calling execv()
The following faulty behavior was observed. The sandbox configured with
CONFIG_SANDBOX_CRASH_RESET=y was invoked with

    ./u-boot -T -S

After executing `exception undefined' the sandbox reboots.
When executing `exception undefined' the sandbox exits with SIGSEGV.

The expected behavior is that the sandbox should reboot again.

If we are relaunching the sandbox in a signal handler, we have to unblock
the respective signal before calling execv(). See signal(7) man-page.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-25 08:30:05 -06:00
Tom Rini
81da5042e5 Merge branch '2022-09-24-add-console-flush' into next
To quote the author:
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.

Some console devices, like UART, have putc/puts functions which just put
characters into HW transmit queue and do not wait until all data are
transmitted. Doing some sensitive operations (like changing baudrate or
starting kernel which resets UART HW) cause that U-Boot messages are lost.

Therefore introduce a new flush() function, implement it for all serial
devices via pending(false) callback and use this new flush() function on
sensitive places after which output device may go into reset state.

This change fixes printing of U-Boot messages:
"## Starting application at ..."
"## Switch baudrate to ..."

In addition, take a patch from Heinrich to rename some EFI test
functions in order to not conflict with this series.
2022-09-24 13:58:49 -04:00
Pali Rohár
efc3f9526f boot: Call flush() before booting
In a lot of cases kernel resets UART HW. To ensure that U-Boot messages
printed before booting the kernel are not lost, call new U-Boot console
flush() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:38 -04:00
Pali Rohár
989cc40f80 serial: Call flush() before changing baudrate
Changing baudrate is a sensitive operation. To ensure that U-Boot messages
printed before changing baudrate are not lost, call new U-Boot console
flush() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:38 -04:00
Pali Rohár
78b5243182 serial: Implement serial_flush() function for console flush() fallback
Like in all other console functions, implement also serial_flush() function
as a fallback int console flush() function.

Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
enabled. So when it is disabled then provides just empty static inline
function serial_flush().

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-09-24 11:34:37 -04:00